^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Based on clk-simple-gates.c, which is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2015 Maxime Ripard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Maxime Ripard <maxime.ripard@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static DEFINE_SPINLOCK(gates_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static void __init sun8i_h3_bus_gates_init(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static const char * const names[] = { "ahb1", "ahb2", "apb1", "apb2" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) enum { AHB1, AHB2, APB1, APB2, PARENT_MAX } clk_parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) const char *parents[PARENT_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct clk_onecell_data *clk_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) const char *clk_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct property *prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct resource res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) void __iomem *clk_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) void __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) const __be32 *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int number, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u8 clk_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) reg = of_io_request_and_map(node, 0, of_node_full_name(node));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) if (IS_ERR(reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) for (i = 0; i < ARRAY_SIZE(names); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int idx = of_property_match_string(node, "clock-names",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) names[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (idx < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) parents[i] = of_clk_get_parent_name(node, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (!clk_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) goto err_unmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) number = of_property_count_u32_elems(node, "clock-indices");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) of_property_read_u32_index(node, "clock-indices", number - 1, &number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (!clk_data->clks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) goto err_free_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) of_property_for_each_u32(node, "clock-indices", prop, p, index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) of_property_read_string_index(node, "clock-output-names",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) i, &clk_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (index == 17 || (index >= 29 && index <= 31))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) clk_parent = AHB2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) else if (index <= 63 || index >= 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) clk_parent = AHB1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) else if (index >= 64 && index <= 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) clk_parent = APB1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) else if (index >= 96 && index <= 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) clk_parent = APB2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) WARN_ON(true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) clk_reg = reg + 4 * (index / 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) clk_bit = index % 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) clk_data->clks[index] = clk_register_gate(NULL, clk_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) parents[clk_parent],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 0, clk_reg, clk_bit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 0, &gates_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (IS_ERR(clk_data->clks[index])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) WARN_ON(true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) clk_data->clk_num = number + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) err_free_data:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) kfree(clk_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) err_unmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) iounmap(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) of_address_to_resource(node, 0, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) release_mem_region(res.start, resource_size(&res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) CLK_OF_DECLARE(sun8i_h3_bus_gates, "allwinner,sun8i-h3-bus-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) sun8i_h3_bus_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) CLK_OF_DECLARE(sun8i_a83t_bus_gates, "allwinner,sun8i-a83t-bus-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) sun8i_h3_bus_gates_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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