^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2015 Maxime Ripard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Maxime Ripard <maxime.ripard@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) static DEFINE_SPINLOCK(gates_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static void __init sunxi_simple_gates_setup(struct device_node *node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) const int protected[],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) int nprotected)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct clk_onecell_data *clk_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) const char *clk_parent, *clk_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct property *prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct resource res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) void __iomem *clk_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) void __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) const __be32 *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int number, i = 0, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u8 clk_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u32 index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) reg = of_io_request_and_map(node, 0, of_node_full_name(node));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) if (IS_ERR(reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) clk_parent = of_clk_get_parent_name(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (!clk_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) goto err_unmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) number = of_property_count_u32_elems(node, "clock-indices");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) of_property_read_u32_index(node, "clock-indices", number - 1, &number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) if (!clk_data->clks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) goto err_free_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) of_property_for_each_u32(node, "clock-indices", prop, p, index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) of_property_read_string_index(node, "clock-output-names",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) i, &clk_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) clk_reg = reg + 4 * (index / 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) clk_bit = index % 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) clk_data->clks[index] = clk_register_gate(NULL, clk_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) clk_parent, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) clk_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) clk_bit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 0, &gates_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if (IS_ERR(clk_data->clks[index])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) WARN_ON(true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) for (j = 0; j < nprotected; j++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (protected[j] == index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) clk_prepare_enable(clk_data->clks[index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) clk_data->clk_num = number + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) err_free_data:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) kfree(clk_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) err_unmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) iounmap(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) of_address_to_resource(node, 0, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) release_mem_region(res.start, resource_size(&res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static void __init sunxi_simple_gates_init(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) sunxi_simple_gates_setup(node, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) CLK_OF_DECLARE(sun4i_a10_gates, "allwinner,sun4i-a10-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) CLK_OF_DECLARE(sun4i_a10_apb0, "allwinner,sun4i-a10-apb0-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) CLK_OF_DECLARE(sun4i_a10_apb1, "allwinner,sun4i-a10-apb1-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) CLK_OF_DECLARE(sun4i_a10_axi, "allwinner,sun4i-a10-axi-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) CLK_OF_DECLARE(sun5i_a10s_apb0, "allwinner,sun5i-a10s-apb0-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) CLK_OF_DECLARE(sun5i_a10s_apb1, "allwinner,sun5i-a10s-apb1-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) CLK_OF_DECLARE(sun5i_a13_apb0, "allwinner,sun5i-a13-apb0-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) CLK_OF_DECLARE(sun5i_a13_apb1, "allwinner,sun5i-a13-apb1-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) CLK_OF_DECLARE(sun6i_a31_ahb1, "allwinner,sun6i-a31-ahb1-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) CLK_OF_DECLARE(sun6i_a31_apb1, "allwinner,sun6i-a31-apb1-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) CLK_OF_DECLARE(sun6i_a31_apb2, "allwinner,sun6i-a31-apb2-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) CLK_OF_DECLARE(sun7i_a20_apb0, "allwinner,sun7i-a20-apb0-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) CLK_OF_DECLARE(sun7i_a20_apb1, "allwinner,sun7i-a20-apb1-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) CLK_OF_DECLARE(sun8i_a23_ahb1, "allwinner,sun8i-a23-ahb1-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) CLK_OF_DECLARE(sun8i_a23_apb1, "allwinner,sun8i-a23-apb1-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) CLK_OF_DECLARE(sun8i_a23_apb2, "allwinner,sun8i-a23-apb2-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) CLK_OF_DECLARE(sun8i_a33_ahb1, "allwinner,sun8i-a33-ahb1-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) CLK_OF_DECLARE(sun8i_a83t_apb0, "allwinner,sun8i-a83t-apb0-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) CLK_OF_DECLARE(sun9i_a80_ahb0, "allwinner,sun9i-a80-ahb0-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) CLK_OF_DECLARE(sun9i_a80_ahb1, "allwinner,sun9i-a80-ahb1-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) CLK_OF_DECLARE(sun9i_a80_ahb2, "allwinner,sun9i-a80-ahb2-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) CLK_OF_DECLARE(sun9i_a80_apb0, "allwinner,sun9i-a80-apb0-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) CLK_OF_DECLARE(sun9i_a80_apb1, "allwinner,sun9i-a80-apb1-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) CLK_OF_DECLARE(sun9i_a80_apbs, "allwinner,sun9i-a80-apbs-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) sunxi_simple_gates_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static const int sun4i_a10_ahb_critical_clocks[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 14, /* ahb_sdram */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static void __init sun4i_a10_ahb_init(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) sunxi_simple_gates_setup(node, sun4i_a10_ahb_critical_clocks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) ARRAY_SIZE(sun4i_a10_ahb_critical_clocks));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) CLK_OF_DECLARE(sun4i_a10_ahb, "allwinner,sun4i-a10-ahb-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) sun4i_a10_ahb_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) CLK_OF_DECLARE(sun5i_a10s_ahb, "allwinner,sun5i-a10s-ahb-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) sun4i_a10_ahb_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) CLK_OF_DECLARE(sun5i_a13_ahb, "allwinner,sun5i-a13-ahb-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) sun4i_a10_ahb_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) CLK_OF_DECLARE(sun7i_a20_ahb, "allwinner,sun7i-a20-ahb-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) sun4i_a10_ahb_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static const int sun4i_a10_dram_critical_clocks[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 15, /* dram_output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static void __init sun4i_a10_dram_init(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) sunxi_simple_gates_setup(node, sun4i_a10_dram_critical_clocks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ARRAY_SIZE(sun4i_a10_dram_critical_clocks));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) CLK_OF_DECLARE(sun4i_a10_dram, "allwinner,sun4i-a10-dram-gates-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) sun4i_a10_dram_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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