Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright 2013 Emilio López
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Emilio López <emilio@elopez.com.ar>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define SUNXI_OSC24M_GATE	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) static DEFINE_SPINLOCK(hosc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static void __init sun4i_osc_clk_setup(struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	struct clk_fixed_rate *fixed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	struct clk_gate *gate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	const char *clk_name = node->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	u32 rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	if (of_property_read_u32(node, "clock-frequency", &rate))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	/* allocate fixed-rate and gate clock structs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	fixed = kzalloc(sizeof(struct clk_fixed_rate), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	if (!fixed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	if (!gate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		goto err_free_fixed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	of_property_read_string(node, "clock-output-names", &clk_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	/* set up gate and fixed rate properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	gate->reg = of_iomap(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	gate->bit_idx = SUNXI_OSC24M_GATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	gate->lock = &hosc_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	fixed->fixed_rate = rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	clk = clk_register_composite(NULL, clk_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 			NULL, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 			NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 			&fixed->hw, &clk_fixed_rate_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 			&gate->hw, &clk_gate_ops, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	if (IS_ERR(clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		goto err_free_gate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	of_clk_add_provider(node, of_clk_src_simple_get, clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) err_free_gate:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	kfree(gate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) err_free_fixed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	kfree(fixed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) CLK_OF_DECLARE(sun4i_osc, "allwinner,sun4i-a10-osc-clk", sun4i_osc_clk_setup);