^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2016 Maxime Ripard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Maxime Ripard <maxime.ripard@free-electrons.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "ccu_gate.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "ccu_nkm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) struct _ccu_nkm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) unsigned long n, min_n, max_n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) unsigned long k, min_k, max_k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) unsigned long m, min_m, max_m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static void ccu_nkm_find_best(unsigned long parent, unsigned long rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct _ccu_nkm *nkm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) unsigned long best_rate = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unsigned long best_n = 0, best_k = 0, best_m = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) unsigned long _n, _k, _m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) for (_k = nkm->min_k; _k <= nkm->max_k; _k++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) for (_n = nkm->min_n; _n <= nkm->max_n; _n++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) for (_m = nkm->min_m; _m <= nkm->max_m; _m++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) unsigned long tmp_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) tmp_rate = parent * _n * _k / _m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) if (tmp_rate > rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) if ((rate - tmp_rate) < (rate - best_rate)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) best_rate = tmp_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) best_n = _n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) best_k = _k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) best_m = _m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) nkm->n = best_n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) nkm->k = best_k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) nkm->m = best_m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static void ccu_nkm_disable(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return ccu_gate_helper_disable(&nkm->common, nkm->enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static int ccu_nkm_enable(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return ccu_gate_helper_enable(&nkm->common, nkm->enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static int ccu_nkm_is_enabled(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return ccu_gate_helper_is_enabled(&nkm->common, nkm->enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static unsigned long ccu_nkm_recalc_rate(struct clk_hw *hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned long parent_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned long n, m, k, rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) reg = readl(nkm->common.base + nkm->common.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) n = reg >> nkm->n.shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) n &= (1 << nkm->n.width) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) n += nkm->n.offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (!n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) n++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) k = reg >> nkm->k.shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) k &= (1 << nkm->k.width) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) k += nkm->k.offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (!k)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) k++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) m = reg >> nkm->m.shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) m &= (1 << nkm->m.width) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) m += nkm->m.offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (!m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) m++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) rate = parent_rate * n * k / m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) rate /= nkm->fixed_post_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct clk_hw *hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) unsigned long *parent_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) unsigned long rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct ccu_nkm *nkm = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct _ccu_nkm _nkm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) _nkm.min_n = nkm->n.min ?: 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) _nkm.max_n = nkm->n.max ?: 1 << nkm->n.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) _nkm.min_k = nkm->k.min ?: 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) _nkm.max_k = nkm->k.max ?: 1 << nkm->k.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) _nkm.min_m = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) _nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) rate *= nkm->fixed_post_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ccu_nkm_find_best(*parent_rate, rate, &_nkm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) rate = *parent_rate * _nkm.n * _nkm.k / _nkm.m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) rate /= nkm->fixed_post_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static int ccu_nkm_determine_rate(struct clk_hw *hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct clk_rate_request *req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return ccu_mux_helper_determine_rate(&nkm->common, &nkm->mux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) req, ccu_nkm_round_rate, nkm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int ccu_nkm_set_rate(struct clk_hw *hw, unsigned long rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) unsigned long parent_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct _ccu_nkm _nkm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) rate *= nkm->fixed_post_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) _nkm.min_n = nkm->n.min ?: 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) _nkm.max_n = nkm->n.max ?: 1 << nkm->n.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) _nkm.min_k = nkm->k.min ?: 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) _nkm.max_k = nkm->k.max ?: 1 << nkm->k.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) _nkm.min_m = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) _nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) ccu_nkm_find_best(parent_rate, rate, &_nkm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) spin_lock_irqsave(nkm->common.lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) reg = readl(nkm->common.base + nkm->common.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) reg &= ~GENMASK(nkm->n.width + nkm->n.shift - 1, nkm->n.shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) reg &= ~GENMASK(nkm->k.width + nkm->k.shift - 1, nkm->k.shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) reg &= ~GENMASK(nkm->m.width + nkm->m.shift - 1, nkm->m.shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) reg |= (_nkm.n - nkm->n.offset) << nkm->n.shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) reg |= (_nkm.k - nkm->k.offset) << nkm->k.shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) reg |= (_nkm.m - nkm->m.offset) << nkm->m.shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) writel(reg, nkm->common.base + nkm->common.reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) spin_unlock_irqrestore(nkm->common.lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ccu_helper_wait_for_lock(&nkm->common, nkm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static u8 ccu_nkm_get_parent(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return ccu_mux_helper_get_parent(&nkm->common, &nkm->mux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static int ccu_nkm_set_parent(struct clk_hw *hw, u8 index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct ccu_nkm *nkm = hw_to_ccu_nkm(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return ccu_mux_helper_set_parent(&nkm->common, &nkm->mux, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) const struct clk_ops ccu_nkm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .disable = ccu_nkm_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .enable = ccu_nkm_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .is_enabled = ccu_nkm_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .get_parent = ccu_nkm_get_parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .set_parent = ccu_nkm_set_parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .determine_rate = ccu_nkm_determine_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .recalc_rate = ccu_nkm_recalc_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .set_rate = ccu_nkm_set_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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