^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2016 Maxime Ripard. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef _CCU_NK_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define _CCU_NK_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "ccu_common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "ccu_div.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "ccu_mult.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * struct ccu_nk - Definition of an N-K clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Clocks based on the formula parent * N * K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct ccu_nk {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) u16 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) u32 enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) u32 lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct ccu_mult_internal n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct ccu_mult_internal k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned int fixed_post_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct ccu_common common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) _nshift, _nwidth, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) _kshift, _kwidth, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) _gate, _lock, _postdiv, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) _flags) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct ccu_nk _struct = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .enable = _gate, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .lock = _lock, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .k = _SUNXI_CCU_MULT(_kshift, _kwidth), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .fixed_post_div = _postdiv, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .common = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .reg = _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .features = CCU_FEATURE_FIXED_POSTDIV, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .hw.init = CLK_HW_INIT(_name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) _parent, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) &ccu_nk_ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) _flags), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static inline struct ccu_nk *hw_to_ccu_nk(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct ccu_common *common = hw_to_ccu_common(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return container_of(common, struct ccu_nk, common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) extern const struct clk_ops ccu_nk_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #endif /* _CCU_NK_H_ */