Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef _CCU_MULT_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define _CCU_MULT_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #include "ccu_common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #include "ccu_frac.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include "ccu_mux.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) struct ccu_mult_internal {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	u8	offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 	u8	shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	u8	width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	u8	min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	u8	max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	{								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		.min	= _min,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		.max	= _max,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		.offset	= _offset,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		.shift	= _shift,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		.width	= _width,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define _SUNXI_CCU_MULT_MIN(_shift, _width, _min)	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	_SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, _min, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset)	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	_SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define _SUNXI_CCU_MULT(_shift, _width)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	_SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, 1, 1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct ccu_mult {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	u32			enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	u32			lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	struct ccu_frac_internal	frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	struct ccu_mult_internal	mult;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	struct ccu_mux_internal	mux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	struct ccu_common	common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define SUNXI_CCU_N_WITH_GATE_LOCK(_struct, _name, _parent, _reg,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 				   _mshift, _mwidth, _gate, _lock,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 				   _flags)				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	struct ccu_mult _struct = {					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		.enable	= _gate,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		.lock	= _lock,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		.mult	= _SUNXI_CCU_MULT(_mshift, _mwidth),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 		.common	= {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 			.reg		= _reg,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 			.hw.init	= CLK_HW_INIT(_name,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 						      _parent,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 						      &ccu_mult_ops,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 						      _flags),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		},							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static inline struct ccu_mult *hw_to_ccu_mult(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	struct ccu_common *common = hw_to_ccu_common(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	return container_of(common, struct ccu_mult, common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) extern const struct clk_ops ccu_mult_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #endif /* _CCU_MULT_H_ */