Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (c) 2016 Maxime Ripard. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #ifndef _COMMON_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define _COMMON_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/compiler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define CCU_FEATURE_FRACTIONAL		BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define CCU_FEATURE_VARIABLE_PREDIV	BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define CCU_FEATURE_FIXED_PREDIV	BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define CCU_FEATURE_FIXED_POSTDIV	BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define CCU_FEATURE_ALL_PREDIV		BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define CCU_FEATURE_LOCK_REG		BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define CCU_FEATURE_MMC_TIMING_SWITCH	BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define CCU_FEATURE_SIGMA_DELTA_MOD	BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* MMC timing mode switch bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define CCU_MMC_NEW_TIMING_MODE		BIT(30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct device_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct ccu_common {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	void __iomem	*base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	u16		reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	u16		lock_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	u32		prediv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	unsigned long	features;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	spinlock_t	*lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	struct clk_hw	hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static inline struct ccu_common *hw_to_ccu_common(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	return container_of(hw, struct ccu_common, hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct sunxi_ccu_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	struct ccu_common		**ccu_clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	unsigned long			num_ccu_clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	struct clk_hw_onecell_data	*hw_clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	struct ccu_reset_map		*resets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	unsigned long			num_resets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct ccu_pll_nb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	struct notifier_block	clk_nb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	struct ccu_common	*common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	u32	enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	u32	lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define to_ccu_pll_nb(_nb) container_of(_nb, struct ccu_pll_nb, clk_nb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int ccu_pll_notifier_register(struct ccu_pll_nb *pll_nb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 		    const struct sunxi_ccu_desc *desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #endif /* _COMMON_H_ */