^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2016 Chen-Yu Tsai. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "ccu_common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "ccu_gate.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "ccu_reset.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "ccu-sun9i-a80-usb.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static const struct clk_parent_data clk_parent_hosc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) { .fw_name = "hosc" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static const struct clk_parent_data clk_parent_bus[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) { .fw_name = "bus" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static SUNXI_CCU_GATE_DATA(bus_hci0_clk, "bus-hci0", clk_parent_bus, 0x0, BIT(1), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static SUNXI_CCU_GATE_DATA(usb_ohci0_clk, "usb-ohci0", clk_parent_hosc, 0x0, BIT(2), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static SUNXI_CCU_GATE_DATA(bus_hci1_clk, "bus-hci1", clk_parent_bus, 0x0, BIT(3), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static SUNXI_CCU_GATE_DATA(bus_hci2_clk, "bus-hci2", clk_parent_bus, 0x0, BIT(5), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static SUNXI_CCU_GATE_DATA(usb_ohci2_clk, "usb-ohci2", clk_parent_hosc, 0x0, BIT(6), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static SUNXI_CCU_GATE_DATA(usb0_phy_clk, "usb0-phy", clk_parent_hosc, 0x4, BIT(1), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static SUNXI_CCU_GATE_DATA(usb1_hsic_clk, "usb1-hsic", clk_parent_hosc, 0x4, BIT(2), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static SUNXI_CCU_GATE_DATA(usb1_phy_clk, "usb1-phy", clk_parent_hosc, 0x4, BIT(3), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static SUNXI_CCU_GATE_DATA(usb2_hsic_clk, "usb2-hsic", clk_parent_hosc, 0x4, BIT(4), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static SUNXI_CCU_GATE_DATA(usb2_phy_clk, "usb2-phy", clk_parent_hosc, 0x4, BIT(5), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static SUNXI_CCU_GATE_DATA(usb_hsic_clk, "usb-hsic", clk_parent_hosc, 0x4, BIT(10), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static struct ccu_common *sun9i_a80_usb_clks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) &bus_hci0_clk.common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) &usb_ohci0_clk.common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) &bus_hci1_clk.common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) &bus_hci2_clk.common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) &usb_ohci2_clk.common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) &usb0_phy_clk.common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) &usb1_hsic_clk.common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) &usb1_phy_clk.common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) &usb2_hsic_clk.common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) &usb2_phy_clk.common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) &usb_hsic_clk.common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static struct clk_hw_onecell_data sun9i_a80_usb_hw_clks = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .hws = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) [CLK_BUS_HCI0] = &bus_hci0_clk.common.hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) [CLK_USB_OHCI0] = &usb_ohci0_clk.common.hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) [CLK_BUS_HCI1] = &bus_hci1_clk.common.hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) [CLK_BUS_HCI2] = &bus_hci2_clk.common.hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) [CLK_USB_OHCI2] = &usb_ohci2_clk.common.hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) [CLK_USB0_PHY] = &usb0_phy_clk.common.hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) [CLK_USB1_HSIC] = &usb1_hsic_clk.common.hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) [CLK_USB1_PHY] = &usb1_phy_clk.common.hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) [CLK_USB2_HSIC] = &usb2_hsic_clk.common.hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) [CLK_USB2_PHY] = &usb2_phy_clk.common.hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) [CLK_USB_HSIC] = &usb_hsic_clk.common.hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .num = CLK_NUMBER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static struct ccu_reset_map sun9i_a80_usb_resets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) [RST_USB0_HCI] = { 0x0, BIT(17) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) [RST_USB1_HCI] = { 0x0, BIT(18) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) [RST_USB2_HCI] = { 0x0, BIT(19) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) [RST_USB0_PHY] = { 0x4, BIT(17) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) [RST_USB1_HSIC] = { 0x4, BIT(18) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) [RST_USB1_PHY] = { 0x4, BIT(19) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) [RST_USB2_HSIC] = { 0x4, BIT(20) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) [RST_USB2_PHY] = { 0x4, BIT(21) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static const struct sunxi_ccu_desc sun9i_a80_usb_clk_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .ccu_clks = sun9i_a80_usb_clks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .num_ccu_clks = ARRAY_SIZE(sun9i_a80_usb_clks),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .hw_clks = &sun9i_a80_usb_hw_clks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .resets = sun9i_a80_usb_resets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .num_resets = ARRAY_SIZE(sun9i_a80_usb_resets),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static int sun9i_a80_usb_clk_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct clk *bus_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) void __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) reg = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) if (IS_ERR(reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return PTR_ERR(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) bus_clk = devm_clk_get(&pdev->dev, "bus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (IS_ERR(bus_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ret = PTR_ERR(bus_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (ret != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) dev_err(&pdev->dev, "Couldn't get bus clk: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* The bus clock needs to be enabled for us to access the registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ret = clk_prepare_enable(bus_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dev_err(&pdev->dev, "Couldn't enable bus clk: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ret = sunxi_ccu_probe(pdev->dev.of_node, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) &sun9i_a80_usb_clk_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) goto err_disable_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) err_disable_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) clk_disable_unprepare(bus_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static const struct of_device_id sun9i_a80_usb_clk_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) { .compatible = "allwinner,sun9i-a80-usb-clks" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static struct platform_driver sun9i_a80_usb_clk_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .probe = sun9i_a80_usb_clk_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .name = "sun9i-a80-usb-clks",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .of_match_table = sun9i_a80_usb_clk_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) builtin_platform_driver(sun9i_a80_usb_clk_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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