^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Spreadtrum gate clock driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (C) 2017 Spreadtrum, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef _SPRD_GATE_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define _SPRD_GATE_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) struct sprd_gate {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) u32 enable_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) u16 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) u16 sc_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) u16 udelay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct sprd_clk_common common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * sprd_gate->flags is used for:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * CLK_GATE_SET_TO_DISABLE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * CLK_GATE_HIWORD_MASK BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * CLK_GATE_BIG_ENDIAN BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * so we define new flags from BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SPRD_GATE_NON_AON BIT(3) /* not alway powered on, check before read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) _gate_flags, _udelay, _ops, _fn) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct sprd_gate _struct = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .enable_mask = _enable_mask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .sc_offset = _sc_offset, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .flags = _gate_flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .udelay = _udelay, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .common = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .regmap = NULL, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .reg = _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .hw.init = _fn(_name, _parent, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) _ops, _flags), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) _gate_flags, _udelay, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) _gate_flags, _udelay, _ops, CLK_HW_INIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) _enable_mask, _flags, _gate_flags, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) _gate_flags, 0, _ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define SPRD_SC_GATE_CLK(_struct, _name, _parent, _reg, _sc_offset, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) _enable_mask, _flags, _gate_flags) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, _sc_offset, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) _enable_mask, _flags, _gate_flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) &sprd_sc_gate_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define SPRD_GATE_CLK(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) _enable_mask, _flags, _gate_flags) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) SPRD_SC_GATE_CLK_OPS(_struct, _name, _parent, _reg, 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) _enable_mask, _flags, _gate_flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) &sprd_gate_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define SPRD_PLL_SC_GATE_CLK(_struct, _name, _parent, _reg, _sc_offset, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) _enable_mask, _flags, _gate_flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) _udelay) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) SPRD_SC_GATE_CLK_OPS_UDELAY(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) _gate_flags, _udelay, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) &sprd_pll_sc_gate_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define SPRD_SC_GATE_CLK_HW_OPS_UDELAY(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) _sc_offset, _enable_mask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) _flags, _gate_flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) _udelay, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) _gate_flags, _udelay, _ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) CLK_HW_INIT_HW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) _gate_flags, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) SPRD_SC_GATE_CLK_HW_OPS_UDELAY(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) _sc_offset, _enable_mask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) _flags, _gate_flags, 0, _ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define SPRD_SC_GATE_CLK_HW(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) _gate_flags) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) _gate_flags, &sprd_sc_gate_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define SPRD_GATE_CLK_HW(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) _enable_mask, _flags, _gate_flags) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) SPRD_SC_GATE_CLK_HW_OPS(_struct, _name, _parent, _reg, 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) _enable_mask, _flags, _gate_flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) &sprd_gate_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define SPRD_PLL_SC_GATE_CLK_HW(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) _gate_flags, _udelay) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) SPRD_SC_GATE_CLK_HW_OPS_UDELAY(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) _sc_offset, _enable_mask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) _flags, _gate_flags, _udelay, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) &sprd_pll_sc_gate_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define SPRD_SC_GATE_CLK_FW_NAME_OPS_UDELAY(_struct, _name, _parent, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) _reg, _sc_offset, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) _gate_flags, _udelay, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) SPRD_SC_GATE_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) _gate_flags, _udelay, _ops, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) CLK_HW_INIT_FW_NAME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define SPRD_SC_GATE_CLK_FW_NAME_OPS(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) _gate_flags, _ops) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) SPRD_SC_GATE_CLK_FW_NAME_OPS_UDELAY(_struct, _name, _parent, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) _reg, _sc_offset, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) _gate_flags, 0, _ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define SPRD_SC_GATE_CLK_FW_NAME(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) _gate_flags) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) SPRD_SC_GATE_CLK_FW_NAME_OPS(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) _gate_flags, &sprd_sc_gate_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define SPRD_GATE_CLK_FW_NAME(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) _enable_mask, _flags, _gate_flags) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) SPRD_SC_GATE_CLK_FW_NAME_OPS(_struct, _name, _parent, _reg, 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) _enable_mask, _flags, _gate_flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) &sprd_gate_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define SPRD_PLL_SC_GATE_CLK_FW_NAME(_struct, _name, _parent, _reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) _sc_offset, _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) _gate_flags, _udelay) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) SPRD_SC_GATE_CLK_FW_NAME_OPS_UDELAY(_struct, _name, _parent, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) _reg, _sc_offset, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) _enable_mask, _flags, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) _gate_flags, _udelay, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) &sprd_pll_sc_gate_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static inline struct sprd_gate *hw_to_sprd_gate(const struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct sprd_clk_common *common = hw_to_sprd_clk_common(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return container_of(common, struct sprd_gate, common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) extern const struct clk_ops sprd_gate_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) extern const struct clk_ops sprd_sc_gate_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) extern const struct clk_ops sprd_pll_sc_gate_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #endif /* _SPRD_GATE_H_ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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