^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Spreadtrum clock infrastructure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Copyright (C) 2017 Spreadtrum, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) static const struct regmap_config sprdclk_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) .reg_bits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .reg_stride = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .val_bits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) .max_register = 0xffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) .fast_io = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static void sprd_clk_set_regmap(const struct sprd_clk_desc *desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct regmap *regmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct sprd_clk_common *cclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) for (i = 0; i < desc->num_clk_clks; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) cclk = desc->clk_clks[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) if (!cclk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) cclk->regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int sprd_clk_regmap_init(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) const struct sprd_clk_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct device_node *node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) if (of_find_property(node, "sprd,syscon", NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) regmap = syscon_regmap_lookup_by_phandle(node, "sprd,syscon");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) pr_err("%s: failed to get syscon regmap\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) } else if (of_device_is_compatible(of_get_parent(dev->of_node),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) "syscon")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) regmap = device_node_to_regmap(of_get_parent(dev->of_node));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) dev_err(dev, "failed to get regmap from its parent.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (IS_ERR(base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return PTR_ERR(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) regmap = devm_regmap_init_mmio(&pdev->dev, base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) &sprdclk_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) pr_err("failed to init regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) sprd_clk_set_regmap(desc, regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) EXPORT_SYMBOL_GPL(sprd_clk_regmap_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int sprd_clk_probe(struct device *dev, struct clk_hw_onecell_data *clkhw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct clk_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) for (i = 0; i < clkhw->num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) hw = clkhw->hws[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (!hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) name = hw->init->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ret = devm_clk_hw_register(dev, hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) dev_err(dev, "Couldn't register clock %d - %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) i, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, clkhw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) dev_err(dev, "Failed to add clock provider\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) EXPORT_SYMBOL_GPL(sprd_clk_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags