^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) menuconfig CLK_SIFIVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) bool "SiFive SoC driver support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) depends on RISCV || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) SoC drivers for SiFive Linux-capable SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) if CLK_SIFIVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) config CLK_SIFIVE_FU540_PRCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) bool "PRCI driver for SiFive FU540 SoCs"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) select CLK_ANALOGBITS_WRPLL_CLN28HPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Supports the Power Reset Clock interface (PRCI) IP block found in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) FU540 SoCs. If this kernel is meant to run on a SiFive FU540 SoC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) enable this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) endif