^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) # Rockchip Clock specific Makefile
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) obj-$(CONFIG_COMMON_CLK_ROCKCHIP) += clk-rockchip.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) obj-$(CONFIG_COMMON_CLK_ROCKCHIP_REGMAP) += regmap/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) clk-rockchip-y += clk.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) clk-rockchip-y += clk-pll.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) clk-rockchip-y += clk-cpu.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) clk-rockchip-y += clk-half-divider.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) clk-rockchip-y += clk-mmc-phase.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) clk-rockchip-y += clk-muxgrf.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) clk-rockchip-$(CONFIG_ROCKCHIP_DDRCLK) += clk-ddr.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) clk-rockchip-$(CONFIG_ROCKCHIP_CLK_INV) += clk-inverter.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) clk-rockchip-$(CONFIG_ROCKCHIP_CLK_PVTM) += clk-pvtm.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) clk-rockchip-$(CONFIG_RESET_CONTROLLER) += softrst.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) obj-$(CONFIG_ROCKCHIP_CLK_LINK) += clk-link.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) obj-$(CONFIG_CLK_PX30) += clk-px30.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) obj-$(CONFIG_CLK_RV1106) += clk-rv1106.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) obj-$(CONFIG_CLK_RV1108) += clk-rv1108.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) obj-$(CONFIG_CLK_RV1126) += clk-rv1126.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) obj-$(CONFIG_CLK_RK1808) += clk-rk1808.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) obj-$(CONFIG_CLK_RK3036) += clk-rk3036.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) obj-$(CONFIG_CLK_RK312X) += clk-rk3128.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) obj-$(CONFIG_CLK_RK3188) += clk-rk3188.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) obj-$(CONFIG_CLK_RK322X) += clk-rk3228.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) obj-$(CONFIG_CLK_RK3288) += clk-rk3288.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) obj-$(CONFIG_CLK_RK3308) += clk-rk3308.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) obj-$(CONFIG_CLK_RK3328) += clk-rk3328.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) obj-$(CONFIG_CLK_RK3368) += clk-rk3368.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) obj-$(CONFIG_CLK_RK3399) += clk-rk3399.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) obj-$(CONFIG_CLK_RK3568) += clk-rk3568.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) obj-$(CONFIG_CLK_RK3588) += clk-rk3588.o