^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2014, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "clk-regmap.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * clk_is_enabled_regmap - standard is_enabled() for regmap users
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * @hw: clk to operate on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Clocks that use regmap for their register I/O can set the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * enable_reg and enable_mask fields in their struct clk_regmap and then use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * this as their is_enabled operation, saving some code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int clk_is_enabled_regmap(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct clk_regmap *rclk = to_clk_regmap(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) ret = regmap_read(rclk->regmap, rclk->enable_reg, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) if (ret != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) if (rclk->enable_is_inverted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) return (val & rclk->enable_mask) == 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return (val & rclk->enable_mask) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) EXPORT_SYMBOL_GPL(clk_is_enabled_regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * clk_enable_regmap - standard enable() for regmap users
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * @hw: clk to operate on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * Clocks that use regmap for their register I/O can set the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * enable_reg and enable_mask fields in their struct clk_regmap and then use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * this as their enable() operation, saving some code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int clk_enable_regmap(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct clk_regmap *rclk = to_clk_regmap(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (rclk->enable_is_inverted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) val = rclk->enable_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return regmap_update_bits(rclk->regmap, rclk->enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) rclk->enable_mask, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) EXPORT_SYMBOL_GPL(clk_enable_regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * clk_disable_regmap - standard disable() for regmap users
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * @hw: clk to operate on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * Clocks that use regmap for their register I/O can set the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * enable_reg and enable_mask fields in their struct clk_regmap and then use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * this as their disable() operation, saving some code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) void clk_disable_regmap(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct clk_regmap *rclk = to_clk_regmap(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (rclk->enable_is_inverted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) val = rclk->enable_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) regmap_update_bits(rclk->regmap, rclk->enable_reg, rclk->enable_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) EXPORT_SYMBOL_GPL(clk_disable_regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * devm_clk_register_regmap - register a clk_regmap clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * @rclk: clk to operate on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * Clocks that use regmap for their register I/O should register their
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * clk_regmap struct via this function so that the regmap is initialized
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * and so that the clock is registered with the common clock framework.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (dev && dev_get_regmap(dev, NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) rclk->regmap = dev_get_regmap(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) else if (dev && dev->parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) rclk->regmap = dev_get_regmap(dev->parent, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return devm_clk_hw_register(dev, &rclk->hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) EXPORT_SYMBOL_GPL(devm_clk_register_regmap);