^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #ifndef __QCOM_CLK_HFPLL_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #define __QCOM_CLK_HFPLL_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include "clk-regmap.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) struct hfpll_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) u32 mode_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) u32 l_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) u32 m_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) u32 n_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) u32 user_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) u32 droop_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) u32 config_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) u32 status_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) u8 lock_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) u32 droop_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) u32 config_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) u32 user_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) u32 user_vco_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) unsigned long low_vco_max_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned long min_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned long max_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct clk_hfpll {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct hfpll_data const *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) int init_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct clk_regmap clkr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define to_clk_hfpll(_hw) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) container_of(to_clk_regmap(_hw), struct clk_hfpll, clkr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) extern const struct clk_ops clk_ops_hfpll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #endif