^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __MACH_MMP_CLK_RESET_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __MACH_MMP_CLK_RESET_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/reset-controller.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define MMP_RESET_INVERT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) struct mmp_clk_reset_cell {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) unsigned int clk_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) void __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) u32 bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) unsigned int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) spinlock_t *lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct mmp_clk_reset_unit {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct reset_controller_dev rcdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct mmp_clk_reset_cell *cells;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #ifdef CONFIG_RESET_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) void mmp_clk_reset_register(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct mmp_clk_reset_cell *cells, int nr_resets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static inline void mmp_clk_reset_register(struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct mmp_clk_reset_cell *cells, int nr_resets)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #endif