Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Amlogic Meson-AXG Clock Controller Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (c) 2016 BayLibre, SAS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Author: Neil Armstrong <narmstrong@baylibre.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Copyright (c) 2018 Amlogic, inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Author: Qiufang Dai <qiufang.dai@amlogic.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * Author: Yixun Lan <yixun.lan@amlogic.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/reset-controller.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "meson-aoclk.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static int meson_aoclk_do_reset(struct reset_controller_dev *rcdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 			       unsigned long id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	struct meson_aoclk_reset_controller *rstc =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		container_of(rcdev, struct meson_aoclk_reset_controller, reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	return regmap_write(rstc->regmap, rstc->data->reset_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 			    BIT(rstc->data->reset[id]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static const struct reset_control_ops meson_aoclk_reset_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	.reset = meson_aoclk_do_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) int meson_aoclkc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	struct meson_aoclk_reset_controller *rstc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	struct meson_aoclk_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	int ret, clkid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	data = (struct meson_aoclk_data *) of_device_get_match_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	rstc = devm_kzalloc(dev, sizeof(*rstc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	if (!rstc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	regmap = syscon_node_to_regmap(of_get_parent(dev->of_node));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	if (IS_ERR(regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 		dev_err(dev, "failed to get regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	/* Reset Controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	rstc->data = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	rstc->regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	rstc->reset.ops = &meson_aoclk_reset_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	rstc->reset.nr_resets = data->num_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	rstc->reset.of_node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	ret = devm_reset_controller_register(dev, &rstc->reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 		dev_err(dev, "failed to register reset controller\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	/* Populate regmap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	for (clkid = 0; clkid < data->num_clks; clkid++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 		data->clks[clkid]->map = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	/* Register all clks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	for (clkid = 0; clkid < data->hw_data->num; clkid++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 		if (!data->hw_data->hws[clkid])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 		ret = devm_clk_hw_register(dev, data->hw_data->hws[clkid]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 		if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 			dev_err(dev, "Clock registration failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 	return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 		(void *) data->hw_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) EXPORT_SYMBOL_GPL(meson_aoclkc_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) MODULE_LICENSE("GPL v2");