Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (c) 2019 BayLibre, SAS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Author: Jerome Brunet <jbrunet@baylibre.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #ifndef __MESON_CLK_PLL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define __MESON_CLK_PLL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "parm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct pll_params_table {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	unsigned int	m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	unsigned int	n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct pll_mult_range {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	unsigned int	min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	unsigned int	max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PLL_PARAMS(_m, _n)						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	{								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		.m		= (_m),					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		.n		= (_n),					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define CLK_MESON_PLL_ROUND_CLOSEST	BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct meson_clk_pll_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	struct parm en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	struct parm m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	struct parm n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	struct parm frac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	struct parm l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	struct parm rst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	const struct reg_sequence *init_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	unsigned int init_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	const struct pll_params_table *table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	const struct pll_mult_range *range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) extern const struct clk_ops meson_clk_pll_ro_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) extern const struct clk_ops meson_clk_pll_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) extern const struct clk_ops meson_clk_pcie_pll_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #endif /* __MESON_CLK_PLL_H */