^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2012-2016 Zhang, Keguang <keguang.zhang@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include "clk.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) struct clk_hw *__init clk_hw_register_pll(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) const char *parent_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) const struct clk_ops *ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) unsigned long flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct clk_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct clk_init_data init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* allocate the divider */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) hw = kzalloc(sizeof(*hw), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) if (!hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) init.name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) init.ops = ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) init.flags = flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) init.parent_names = parent_name ? &parent_name : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) init.num_parents = parent_name ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) hw->init = &init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* register the clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) ret = clk_hw_register(dev, hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) kfree(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) hw = ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }