^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) # Hisilicon Clock specific Makefile
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o clk-hisi-phase.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) obj-$(CONFIG_ARCH_HI3xxx) += clk-hi3620.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) obj-$(CONFIG_ARCH_HIP04) += clk-hip04.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) obj-$(CONFIG_ARCH_HIX5HD2) += clk-hix5hd2.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) obj-$(CONFIG_COMMON_CLK_HI3516CV300) += crg-hi3516cv300.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) obj-$(CONFIG_COMMON_CLK_HI3519) += clk-hi3519.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) obj-$(CONFIG_COMMON_CLK_HI3660) += clk-hi3660.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) obj-$(CONFIG_COMMON_CLK_HI3670) += clk-hi3670.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) obj-$(CONFIG_COMMON_CLK_HI3798CV200) += crg-hi3798cv200.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) obj-$(CONFIG_COMMON_CLK_HI6220) += clk-hi6220.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) obj-$(CONFIG_RESET_HISI) += reset.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) obj-$(CONFIG_STUB_CLK_HI6220) += clk-hi6220-stub.o
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) obj-$(CONFIG_STUB_CLK_HI3660) += clk-hi3660-stub.o