^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Clock driver for TI Davinci PSC controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2018 David Lechner <david@lechnology.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef __CLK_DAVINCI_PSC_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __CLK_DAVINCI_PSC_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* PSC quirk flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define LPSC_ALWAYS_ENABLED BIT(0) /* never disable this clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define LPSC_SET_RATE_PARENT BIT(1) /* propagate set_rate to parent clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define LPSC_FORCE BIT(2) /* requires MDCTL FORCE bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define LPSC_LOCAL_RESET BIT(3) /* acts as reset provider */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct davinci_lpsc_clkdev_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) const char *con_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) const char *dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define LPSC_CLKDEV(c, d) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .con_id = (c), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .dev_id = (d) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define LPSC_CLKDEV1(n, c, d) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static const struct davinci_lpsc_clkdev_info n[] __initconst = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) LPSC_CLKDEV((c), (d)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) { } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define LPSC_CLKDEV2(n, c1, d1, c2, d2) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static const struct davinci_lpsc_clkdev_info n[] __initconst = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) LPSC_CLKDEV((c1), (d1)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) LPSC_CLKDEV((c2), (d2)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) { } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define LPSC_CLKDEV3(n, c1, d1, c2, d2, c3, d3) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static const struct davinci_lpsc_clkdev_info n[] __initconst = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) LPSC_CLKDEV((c1), (d1)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) LPSC_CLKDEV((c2), (d2)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) LPSC_CLKDEV((c3), (d3)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) { } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * davinci_lpsc_clk_info - LPSC module-specific clock information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * @name: the clock name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @parent: the parent clock name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * @cdevs: optional array of clkdev lookup table info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * @md: the local module domain (LPSC id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * @pd: the power domain id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @flags: bitmask of LPSC_* flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct davinci_lpsc_clk_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) const char *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) const struct davinci_lpsc_clkdev_info *cdevs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u32 md;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u32 pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define LPSC(m, d, n, p, c, f) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .name = #n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .parent = #p, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .cdevs = (c), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .md = (m), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .pd = (d), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .flags = (f), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int davinci_psc_register_clocks(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) const struct davinci_lpsc_clk_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) u8 num_clks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) void __iomem *base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) int of_davinci_psc_clk_init(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) const struct davinci_lpsc_clk_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) u8 num_clks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) void __iomem *base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* Device-specific data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct davinci_psc_init_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct clk_bulk_data *parent_clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) int num_parent_clks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) int (*psc_init)(struct device *dev, void __iomem *base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #ifdef CONFIG_ARCH_DAVINCI_DA830
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) extern const struct davinci_psc_init_data da830_psc0_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) extern const struct davinci_psc_init_data da830_psc1_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #ifdef CONFIG_ARCH_DAVINCI_DA850
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) extern const struct davinci_psc_init_data da850_psc0_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) extern const struct davinci_psc_init_data da850_psc1_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) extern const struct davinci_psc_init_data of_da850_psc0_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) extern const struct davinci_psc_init_data of_da850_psc1_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #ifdef CONFIG_ARCH_DAVINCI_DM355
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) extern const struct davinci_psc_init_data dm355_psc_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #ifdef CONFIG_ARCH_DAVINCI_DM365
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) extern const struct davinci_psc_init_data dm365_psc_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #ifdef CONFIG_ARCH_DAVINCI_DM644x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) extern const struct davinci_psc_init_data dm644x_psc_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #ifdef CONFIG_ARCH_DAVINCI_DM646x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) extern const struct davinci_psc_init_data dm646x_psc_init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #endif /* __CLK_DAVINCI_PSC_H__ */