^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - https://www.ti.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Jyri Sarha <jsarha@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Sergej Sawazki <ce3a@gmx.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Gpio controlled clock implementation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * DOC: basic gpio gated clock which can be enabled and disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * with gpio output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Traits of this clock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * prepare - clk_(un)prepare only ensures parent is (un)prepared
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * enable - clk_enable and clk_disable are functional & control gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * rate - inherits rate from parent. No clk_set_rate support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * parent - fixed parent. No clk_set_parent support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * struct clk_gpio - gpio gated clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * @hw: handle between common and hardware-specific interfaces
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * @gpiod: gpio descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * Clock with a gpio control for enabling and disabling the parent clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * or switching between two parents by asserting or deasserting the gpio.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * Implements .enable, .disable and .is_enabled or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * .get_parent, .set_parent and .determine_rate depending on which clk_ops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct clk_gpio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct clk_hw hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct gpio_desc *gpiod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static int clk_gpio_gate_enable(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct clk_gpio *clk = to_clk_gpio(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) gpiod_set_value(clk->gpiod, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static void clk_gpio_gate_disable(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct clk_gpio *clk = to_clk_gpio(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) gpiod_set_value(clk->gpiod, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct clk_gpio *clk = to_clk_gpio(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return gpiod_get_value(clk->gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static const struct clk_ops clk_gpio_gate_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .enable = clk_gpio_gate_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .disable = clk_gpio_gate_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .is_enabled = clk_gpio_gate_is_enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static int clk_sleeping_gpio_gate_prepare(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct clk_gpio *clk = to_clk_gpio(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) gpiod_set_value_cansleep(clk->gpiod, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static void clk_sleeping_gpio_gate_unprepare(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct clk_gpio *clk = to_clk_gpio(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) gpiod_set_value_cansleep(clk->gpiod, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static int clk_sleeping_gpio_gate_is_prepared(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct clk_gpio *clk = to_clk_gpio(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return gpiod_get_value_cansleep(clk->gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static const struct clk_ops clk_sleeping_gpio_gate_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .prepare = clk_sleeping_gpio_gate_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .unprepare = clk_sleeping_gpio_gate_unprepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .is_prepared = clk_sleeping_gpio_gate_is_prepared,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * DOC: basic clock multiplexer which can be controlled with a gpio output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * Traits of this clock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * prepare - clk_prepare only ensures that parents are prepared
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * rate - rate is only affected by parent switching. No clk_set_rate support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * parent - parent is adjustable through clk_set_parent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct clk_gpio *clk = to_clk_gpio(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return gpiod_get_value_cansleep(clk->gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct clk_gpio *clk = to_clk_gpio(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) gpiod_set_value_cansleep(clk->gpiod, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static const struct clk_ops clk_gpio_mux_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .get_parent = clk_gpio_mux_get_parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .set_parent = clk_gpio_mux_set_parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .determine_rate = __clk_mux_determine_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static struct clk_hw *clk_register_gpio(struct device *dev, u8 num_parents,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct gpio_desc *gpiod,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) const struct clk_ops *clk_gpio_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct clk_gpio *clk_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct clk_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct clk_init_data init = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) const struct clk_parent_data gpio_parent_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) { .index = 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) { .index = 1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (!clk_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) init.name = dev->of_node->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) init.ops = clk_gpio_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) init.parent_data = gpio_parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) init.num_parents = num_parents;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) init.flags = CLK_SET_RATE_PARENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) clk_gpio->gpiod = gpiod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) clk_gpio->hw.init = &init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) hw = &clk_gpio->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) err = devm_clk_hw_register(dev, hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return ERR_PTR(err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static struct clk_hw *clk_hw_register_gpio_gate(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) int num_parents,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct gpio_desc *gpiod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) const struct clk_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (gpiod_cansleep(gpiod))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ops = &clk_sleeping_gpio_gate_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ops = &clk_gpio_gate_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return clk_register_gpio(dev, num_parents, gpiod, ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static struct clk_hw *clk_hw_register_gpio_mux(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct gpio_desc *gpiod)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return clk_register_gpio(dev, 2, gpiod, &clk_gpio_mux_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int gpio_clk_driver_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct device_node *node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) const char *gpio_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) unsigned int num_parents;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct gpio_desc *gpiod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct clk_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) bool is_mux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) is_mux = of_device_is_compatible(node, "gpio-mux-clock");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) num_parents = of_clk_get_parent_count(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) if (is_mux && num_parents != 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) dev_err(dev, "mux-clock must have 2 parents\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) gpio_name = is_mux ? "select" : "enable";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) gpiod = devm_gpiod_get(dev, gpio_name, GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (IS_ERR(gpiod)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) ret = PTR_ERR(gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (ret == -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) pr_debug("%pOFn: %s: GPIOs not yet available, retry later\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) node, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) pr_err("%pOFn: %s: Can't get '%s' named GPIO property\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) node, __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) gpio_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (is_mux)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) hw = clk_hw_register_gpio_mux(dev, gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) hw = clk_hw_register_gpio_gate(dev, num_parents, gpiod);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (IS_ERR(hw))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return PTR_ERR(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static const struct of_device_id gpio_clk_match_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) { .compatible = "gpio-mux-clock" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) { .compatible = "gpio-gate-clock" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static struct platform_driver gpio_clk_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .probe = gpio_clk_driver_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .name = "gpio-clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .of_match_table = gpio_clk_match_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) builtin_platform_driver(gpio_clk_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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