^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * CS2000 -- CIRRUS LOGIC Fractional-N Clock Synthesizer & Clock Multiplier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2015 Renesas Electronics Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define CH_MAX 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define RATIO_REG_SIZE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define DEVICE_ID 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define DEVICE_CTRL 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define DEVICE_CFG1 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define DEVICE_CFG2 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define GLOBAL_CFG 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define Ratio_Add(x, nth) (6 + (x * 4) + (nth))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define Ratio_Val(x, nth) ((x >> (24 - (8 * nth))) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define Val_Ratio(x, nth) ((x & 0xFF) << (24 - (8 * nth)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define FUNC_CFG1 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define FUNC_CFG2 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* DEVICE_ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define REVISION_MASK (0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define REVISION_B2_B3 (0x4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define REVISION_C1 (0x6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* DEVICE_CTRL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PLL_UNLOCK (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define AUXOUTDIS (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define CLKOUTDIS (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* DEVICE_CFG1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define RSEL(x) (((x) & 0x3) << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define RSEL_MASK RSEL(0x3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define ENDEV1 (0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* DEVICE_CFG2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define AUTORMOD (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define LOCKCLK(x) (((x) & 0x3) << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define LOCKCLK_MASK LOCKCLK(0x3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define FRACNSRC_MASK (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define FRACNSRC_STATIC (0 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define FRACNSRC_DYNAMIC (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* GLOBAL_CFG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define ENDEV2 (0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* FUNC_CFG1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define CLKSKIPEN (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define REFCLKDIV(x) (((x) & 0x3) << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define REFCLKDIV_MASK REFCLKDIV(0x3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* FUNC_CFG2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define LFRATIO_MASK (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define LFRATIO_20_12 (0 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define LFRATIO_12_20 (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define CH_SIZE_ERR(ch) ((ch < 0) || (ch >= CH_MAX))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define hw_to_priv(_hw) container_of(_hw, struct cs2000_priv, hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define priv_to_client(priv) (priv->client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define priv_to_dev(priv) (&(priv_to_client(priv)->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define CLK_IN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define REF_CLK 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define CLK_MAX 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct cs2000_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct clk_hw hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct clk *clk_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct clk *ref_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* suspend/resume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned long saved_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned long saved_parent_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static const struct of_device_id cs2000_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) { .compatible = "cirrus,cs2000-cp", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) MODULE_DEVICE_TABLE(of, cs2000_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static const struct i2c_device_id cs2000_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) { "cs2000-cp", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MODULE_DEVICE_TABLE(i2c, cs2000_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define cs2000_read(priv, addr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) i2c_smbus_read_byte_data(priv_to_client(priv), addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define cs2000_write(priv, addr, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) i2c_smbus_write_byte_data(priv_to_client(priv), addr, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static int cs2000_bset(struct cs2000_priv *priv, u8 addr, u8 mask, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) s32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) data = cs2000_read(priv, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (data < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) data &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) data |= (val & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return cs2000_write(priv, addr, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static int cs2000_enable_dev_config(struct cs2000_priv *priv, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ret = cs2000_bset(priv, DEVICE_CFG1, ENDEV1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) enable ? ENDEV1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ret = cs2000_bset(priv, GLOBAL_CFG, ENDEV2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) enable ? ENDEV2 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) ret = cs2000_bset(priv, FUNC_CFG1, CLKSKIPEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) enable ? CLKSKIPEN : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* FIXME: for Static ratio mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ret = cs2000_bset(priv, FUNC_CFG2, LFRATIO_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) LFRATIO_12_20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int cs2000_clk_in_bound_rate(struct cs2000_priv *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) u32 rate_in)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (rate_in >= 32000000 && rate_in < 56000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) val = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) else if (rate_in >= 16000000 && rate_in < 28000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) val = 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) else if (rate_in >= 8000000 && rate_in < 14000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) val = 0x2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return cs2000_bset(priv, FUNC_CFG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) REFCLKDIV_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) REFCLKDIV(val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static int cs2000_wait_pll_lock(struct cs2000_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct device *dev = priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) s32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) for (i = 0; i < 256; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) val = cs2000_read(priv, DEVICE_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (!(val & PLL_UNLOCK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) dev_err(dev, "pll lock failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static int cs2000_clk_out_enable(struct cs2000_priv *priv, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* enable both AUX_OUT, CLK_OUT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return cs2000_bset(priv, DEVICE_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) (AUXOUTDIS | CLKOUTDIS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) enable ? 0 :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) (AUXOUTDIS | CLKOUTDIS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static u32 cs2000_rate_to_ratio(u32 rate_in, u32 rate_out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) u64 ratio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * ratio = rate_out / rate_in * 2^20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * To avoid over flow, rate_out is u64.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * The result should be u32.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) ratio = (u64)rate_out << 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) do_div(ratio, rate_in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return ratio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static unsigned long cs2000_ratio_to_rate(u32 ratio, u32 rate_in)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) u64 rate_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * ratio = rate_out / rate_in * 2^20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * To avoid over flow, rate_out is u64.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * The result should be u32 or unsigned long.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) rate_out = (u64)ratio * rate_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return rate_out >> 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static int cs2000_ratio_set(struct cs2000_priv *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) int ch, u32 rate_in, u32 rate_out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (CH_SIZE_ERR(ch))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) val = cs2000_rate_to_ratio(rate_in, rate_out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) for (i = 0; i < RATIO_REG_SIZE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ret = cs2000_write(priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) Ratio_Add(ch, i),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) Ratio_Val(val, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static u32 cs2000_ratio_get(struct cs2000_priv *priv, int ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) s32 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) for (i = 0; i < RATIO_REG_SIZE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) tmp = cs2000_read(priv, Ratio_Add(ch, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (tmp < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) val |= Val_Ratio(tmp, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static int cs2000_ratio_select(struct cs2000_priv *priv, int ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (CH_SIZE_ERR(ch))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * FIXME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * this driver supports static ratio mode only at this point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ret = cs2000_bset(priv, DEVICE_CFG1, RSEL_MASK, RSEL(ch));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ret = cs2000_bset(priv, DEVICE_CFG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) (AUTORMOD | LOCKCLK_MASK | FRACNSRC_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) (LOCKCLK(ch) | FRACNSRC_STATIC));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static unsigned long cs2000_recalc_rate(struct clk_hw *hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) unsigned long parent_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct cs2000_priv *priv = hw_to_priv(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) int ch = 0; /* it uses ch0 only at this point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) u32 ratio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) ratio = cs2000_ratio_get(priv, ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return cs2000_ratio_to_rate(ratio, parent_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static long cs2000_round_rate(struct clk_hw *hw, unsigned long rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) unsigned long *parent_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) u32 ratio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) ratio = cs2000_rate_to_ratio(*parent_rate, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) return cs2000_ratio_to_rate(ratio, *parent_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static int __cs2000_set_rate(struct cs2000_priv *priv, int ch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) unsigned long rate, unsigned long parent_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) ret = cs2000_clk_in_bound_rate(priv, parent_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) ret = cs2000_ratio_set(priv, ch, parent_rate, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) ret = cs2000_ratio_select(priv, ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) priv->saved_rate = rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) priv->saved_parent_rate = parent_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static int cs2000_set_rate(struct clk_hw *hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) unsigned long rate, unsigned long parent_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) struct cs2000_priv *priv = hw_to_priv(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) int ch = 0; /* it uses ch0 only at this point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return __cs2000_set_rate(priv, ch, rate, parent_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static int cs2000_set_saved_rate(struct cs2000_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) int ch = 0; /* it uses ch0 only at this point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return __cs2000_set_rate(priv, ch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) priv->saved_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) priv->saved_parent_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static int cs2000_enable(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) struct cs2000_priv *priv = hw_to_priv(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) ret = cs2000_enable_dev_config(priv, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) ret = cs2000_clk_out_enable(priv, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ret = cs2000_wait_pll_lock(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static void cs2000_disable(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) struct cs2000_priv *priv = hw_to_priv(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) cs2000_enable_dev_config(priv, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) cs2000_clk_out_enable(priv, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static u8 cs2000_get_parent(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) /* always return REF_CLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return REF_CLK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static const struct clk_ops cs2000_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .get_parent = cs2000_get_parent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .recalc_rate = cs2000_recalc_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .round_rate = cs2000_round_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .set_rate = cs2000_set_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .prepare = cs2000_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .unprepare = cs2000_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static int cs2000_clk_get(struct cs2000_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct device *dev = priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct clk *clk_in, *ref_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) clk_in = devm_clk_get(dev, "clk_in");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) /* not yet provided */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (IS_ERR(clk_in))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) ref_clk = devm_clk_get(dev, "ref_clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) /* not yet provided */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (IS_ERR(ref_clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) priv->clk_in = clk_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) priv->ref_clk = ref_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static int cs2000_clk_register(struct cs2000_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) struct device *dev = priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) struct clk_init_data init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) const char *name = np->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static const char *parent_names[CLK_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) int ch = 0; /* it uses ch0 only at this point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) int rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) of_property_read_string(np, "clock-output-names", &name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) * set default rate as 1/1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) * otherwise .set_rate which setup ratio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) * is never called if user requests 1/1 rate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) rate = clk_get_rate(priv->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) ret = __cs2000_set_rate(priv, ch, rate, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) parent_names[CLK_IN] = __clk_get_name(priv->clk_in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) parent_names[REF_CLK] = __clk_get_name(priv->ref_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) init.name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) init.ops = &cs2000_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) init.flags = CLK_SET_RATE_GATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) init.parent_names = parent_names;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) init.num_parents = ARRAY_SIZE(parent_names);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) priv->hw.init = &init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) ret = clk_hw_register(dev, &priv->hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &priv->hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) clk_hw_unregister(&priv->hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) static int cs2000_version_print(struct cs2000_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) struct device *dev = priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) s32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) const char *revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) val = cs2000_read(priv, DEVICE_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) /* CS2000 should be 0x0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) if (val >> 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) switch (val & REVISION_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) case REVISION_B2_B3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) revision = "B2 / B3";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) case REVISION_C1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) revision = "C1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) dev_info(dev, "revision - %s\n", revision);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) static int cs2000_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) struct cs2000_priv *priv = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) struct device *dev = priv_to_dev(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) of_clk_del_provider(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) clk_hw_unregister(&priv->hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static int cs2000_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) struct cs2000_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) priv->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) i2c_set_clientdata(client, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) ret = cs2000_clk_get(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) ret = cs2000_clk_register(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) ret = cs2000_version_print(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) goto probe_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) probe_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) cs2000_remove(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) static int __maybe_unused cs2000_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) struct cs2000_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) return cs2000_set_saved_rate(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) static const struct dev_pm_ops cs2000_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) SET_LATE_SYSTEM_SLEEP_PM_OPS(NULL, cs2000_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static struct i2c_driver cs2000_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .name = "cs2000-cp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .pm = &cs2000_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .of_match_table = cs2000_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) .probe = cs2000_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) .remove = cs2000_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) .id_table = cs2000_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) module_i2c_driver(cs2000_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) MODULE_DESCRIPTION("CS2000-CP driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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