^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (C) 2013 Broadcom Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2013 Linaro Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "clk-kona.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* These are used when a selector or trigger is found to be unneeded */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define selector_clear_exists(sel) ((sel)->width = 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define trigger_clear_exists(trig) FLAG_CLEAR(trig, TRIG, EXISTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* Validity checking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static bool ccu_data_offsets_valid(struct ccu_data *ccu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct ccu_policy *ccu_policy = &ccu->policy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u32 limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) limit = ccu->range - sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) limit = round_down(limit, sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) if (ccu_policy_exists(ccu_policy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) if (ccu_policy->enable.offset > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) pr_err("%s: bad policy enable offset for %s "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) "(%u > %u)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) ccu->name, ccu_policy->enable.offset, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (ccu_policy->control.offset > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) pr_err("%s: bad policy control offset for %s "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) "(%u > %u)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ccu->name, ccu_policy->control.offset, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static bool clk_requires_trigger(struct kona_clk *bcm_clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct peri_clk_data *peri = bcm_clk->u.peri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct bcm_clk_sel *sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct bcm_clk_div *div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (bcm_clk->type != bcm_clk_peri)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) sel = &peri->sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (sel->parent_count && selector_exists(sel))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) div = &peri->div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (!divider_exists(div))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* Fixed dividers don't need triggers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (!divider_is_fixed(div))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) div = &peri->pre_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return divider_exists(div) && !divider_is_fixed(div);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static bool peri_clk_data_offsets_valid(struct kona_clk *bcm_clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct peri_clk_data *peri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct bcm_clk_policy *policy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct bcm_clk_gate *gate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct bcm_clk_hyst *hyst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct bcm_clk_div *div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct bcm_clk_sel *sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct bcm_clk_trig *trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) u32 range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) u32 limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) BUG_ON(bcm_clk->type != bcm_clk_peri);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) peri = bcm_clk->u.peri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) name = bcm_clk->init_data.name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) range = bcm_clk->ccu->range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) limit = range - sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) limit = round_down(limit, sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) policy = &peri->policy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (policy_exists(policy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (policy->offset > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) pr_err("%s: bad policy offset for %s (%u > %u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) __func__, name, policy->offset, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) gate = &peri->gate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) hyst = &peri->hyst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) if (gate_exists(gate)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (gate->offset > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) pr_err("%s: bad gate offset for %s (%u > %u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) __func__, name, gate->offset, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (hyst_exists(hyst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (hyst->offset > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) pr_err("%s: bad hysteresis offset for %s "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) "(%u > %u)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) name, hyst->offset, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) } else if (hyst_exists(hyst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) pr_err("%s: hysteresis but no gate for %s\n", __func__, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) div = &peri->div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (divider_exists(div)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (div->u.s.offset > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) pr_err("%s: bad divider offset for %s (%u > %u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) __func__, name, div->u.s.offset, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) div = &peri->pre_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (divider_exists(div)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (div->u.s.offset > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) pr_err("%s: bad pre-divider offset for %s "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) "(%u > %u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) __func__, name, div->u.s.offset, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) sel = &peri->sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (selector_exists(sel)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (sel->offset > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) pr_err("%s: bad selector offset for %s (%u > %u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) __func__, name, sel->offset, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) trig = &peri->trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (trigger_exists(trig)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (trig->offset > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) pr_err("%s: bad trigger offset for %s (%u > %u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) __func__, name, trig->offset, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) trig = &peri->pre_trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (trigger_exists(trig)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (trig->offset > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) pr_err("%s: bad pre-trigger offset for %s (%u > %u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) __func__, name, trig->offset, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /* A bit position must be less than the number of bits in a 32-bit register. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static bool bit_posn_valid(u32 bit_posn, const char *field_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) const char *clock_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) u32 limit = BITS_PER_BYTE * sizeof(u32) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (bit_posn > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) pr_err("%s: bad %s bit for %s (%u > %u)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) field_name, clock_name, bit_posn, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * A bitfield must be at least 1 bit wide. Both the low-order and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * high-order bits must lie within a 32-bit register. We require
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * fields to be less than 32 bits wide, mainly because we use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * shifting to produce field masks, and shifting a full word width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * is not well-defined by the C standard.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static bool bitfield_valid(u32 shift, u32 width, const char *field_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) const char *clock_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) u32 limit = BITS_PER_BYTE * sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (!width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) pr_err("%s: bad %s field width 0 for %s\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) field_name, clock_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (shift + width > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) pr_err("%s: bad %s for %s (%u + %u > %u)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) field_name, clock_name, shift, width, limit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ccu_policy_valid(struct ccu_policy *ccu_policy, const char *ccu_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) struct bcm_lvm_en *enable = &ccu_policy->enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct bcm_policy_ctl *control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (!bit_posn_valid(enable->bit, "policy enable", ccu_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) control = &ccu_policy->control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (!bit_posn_valid(control->go_bit, "policy control GO", ccu_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (!bit_posn_valid(control->atl_bit, "policy control ATL", ccu_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (!bit_posn_valid(control->ac_bit, "policy control AC", ccu_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static bool policy_valid(struct bcm_clk_policy *policy, const char *clock_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (!bit_posn_valid(policy->bit, "policy", clock_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * All gates, if defined, have a status bit, and for hardware-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * gates, that's it. Gates that can be software controlled also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * have an enable bit. And a gate that can be hardware or software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * controlled will have a hardware/software select bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static bool gate_valid(struct bcm_clk_gate *gate, const char *field_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) const char *clock_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (!bit_posn_valid(gate->status_bit, "gate status", clock_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (gate_is_sw_controllable(gate)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (!bit_posn_valid(gate->en_bit, "gate enable", clock_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (gate_is_hw_controllable(gate)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) if (!bit_posn_valid(gate->hw_sw_sel_bit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) "gate hw/sw select",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) clock_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) BUG_ON(!gate_is_hw_controllable(gate));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static bool hyst_valid(struct bcm_clk_hyst *hyst, const char *clock_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (!bit_posn_valid(hyst->en_bit, "hysteresis enable", clock_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (!bit_posn_valid(hyst->val_bit, "hysteresis value", clock_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) * A selector bitfield must be valid. Its parent_sel array must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) * also be reasonable for the field.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static bool sel_valid(struct bcm_clk_sel *sel, const char *field_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) const char *clock_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (!bitfield_valid(sel->shift, sel->width, field_name, clock_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) if (sel->parent_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) u32 max_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) u32 limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * Make sure the selector field can hold all the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) * selector values we expect to be able to use. A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * clock only needs to have a selector defined if it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * has more than one parent. And in that case the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * highest selector value will be in the last entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * in the array.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) max_sel = sel->parent_sel[sel->parent_count - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) limit = (1 << sel->width) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) if (max_sel > limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) pr_err("%s: bad selector for %s "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) "(%u needs > %u bits)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) __func__, clock_name, max_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) sel->width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) pr_warn("%s: ignoring selector for %s (no parents)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) __func__, clock_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) selector_clear_exists(sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) kfree(sel->parent_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) sel->parent_sel = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * A fixed divider just needs to be non-zero. A variable divider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * has to have a valid divider bitfield, and if it has a fraction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * the width of the fraction must not be no more than the width of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) * the divider as a whole.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static bool div_valid(struct bcm_clk_div *div, const char *field_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) const char *clock_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (divider_is_fixed(div)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /* Any fixed divider value but 0 is OK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (div->u.fixed == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) pr_err("%s: bad %s fixed value 0 for %s\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) field_name, clock_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (!bitfield_valid(div->u.s.shift, div->u.s.width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) field_name, clock_name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (divider_has_fraction(div))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (div->u.s.frac_width > div->u.s.width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) pr_warn("%s: bad %s fraction width for %s (%u > %u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) __func__, field_name, clock_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) div->u.s.frac_width, div->u.s.width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) * If a clock has two dividers, the combined number of fractional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) * bits must be representable in a 32-bit unsigned value. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) * is because we scale up a dividend using both dividers before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) * dividing to improve accuracy, and we need to avoid overflow.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static bool kona_dividers_valid(struct kona_clk *bcm_clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) struct peri_clk_data *peri = bcm_clk->u.peri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) struct bcm_clk_div *div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) struct bcm_clk_div *pre_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) u32 limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) BUG_ON(bcm_clk->type != bcm_clk_peri);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (!divider_exists(&peri->div) || !divider_exists(&peri->pre_div))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) div = &peri->div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) pre_div = &peri->pre_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (divider_is_fixed(div) || divider_is_fixed(pre_div))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) limit = BITS_PER_BYTE * sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return div->u.s.frac_width + pre_div->u.s.frac_width <= limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) /* A trigger just needs to represent a valid bit position */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static bool trig_valid(struct bcm_clk_trig *trig, const char *field_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) const char *clock_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return bit_posn_valid(trig->bit, field_name, clock_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) /* Determine whether the set of peripheral clock registers are valid. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) peri_clk_data_valid(struct kona_clk *bcm_clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) struct peri_clk_data *peri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) struct bcm_clk_policy *policy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct bcm_clk_gate *gate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) struct bcm_clk_hyst *hyst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) struct bcm_clk_sel *sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) struct bcm_clk_div *div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) struct bcm_clk_div *pre_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) struct bcm_clk_trig *trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) BUG_ON(bcm_clk->type != bcm_clk_peri);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * First validate register offsets. This is the only place
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * where we need something from the ccu, so we do these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) * together.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) if (!peri_clk_data_offsets_valid(bcm_clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) peri = bcm_clk->u.peri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) name = bcm_clk->init_data.name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) policy = &peri->policy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (policy_exists(policy) && !policy_valid(policy, name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) gate = &peri->gate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (gate_exists(gate) && !gate_valid(gate, "gate", name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) hyst = &peri->hyst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (hyst_exists(hyst) && !hyst_valid(hyst, name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) sel = &peri->sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) if (selector_exists(sel)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (!sel_valid(sel, "selector", name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) } else if (sel->parent_count > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) pr_err("%s: multiple parents but no selector for %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) __func__, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) div = &peri->div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) pre_div = &peri->pre_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (divider_exists(div)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (!div_valid(div, "divider", name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) if (divider_exists(pre_div))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) if (!div_valid(pre_div, "pre-divider", name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) } else if (divider_exists(pre_div)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) pr_err("%s: pre-divider but no divider for %s\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) trig = &peri->trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (trigger_exists(trig)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (!trig_valid(trig, "trigger", name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (trigger_exists(&peri->pre_trig)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if (!trig_valid(trig, "pre-trigger", name)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) if (!clk_requires_trigger(bcm_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) pr_warn("%s: ignoring trigger for %s (not needed)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) __func__, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) trigger_clear_exists(trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) } else if (trigger_exists(&peri->pre_trig)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) pr_err("%s: pre-trigger but no trigger for %s\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) } else if (clk_requires_trigger(bcm_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) pr_err("%s: required trigger missing for %s\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) return kona_dividers_valid(bcm_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) static bool kona_clk_valid(struct kona_clk *bcm_clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) switch (bcm_clk->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) case bcm_clk_peri:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (!peri_clk_data_valid(bcm_clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) pr_err("%s: unrecognized clock type (%d)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) (int)bcm_clk->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) * Scan an array of parent clock names to determine whether there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) * are any entries containing BAD_CLK_NAME. Such entries are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) * placeholders for non-supported clocks. Keep track of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) * position of each clock name in the original array.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) * Allocates an array of pointers to to hold the names of all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) * non-null entries in the original array, and returns a pointer to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) * that array in *names. This will be used for registering the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) * clock with the common clock code. On successful return,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) * *count indicates how many entries are in that names array.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) * If there is more than one entry in the resulting names array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) * another array is allocated to record the parent selector value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) * for each (defined) parent clock. This is the value that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) * represents this parent clock in the clock's source selector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) * register. The position of the clock in the original parent array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) * defines that selector value. The number of entries in this array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) * is the same as the number of entries in the parent names array.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) * The array of selector values is returned. If the clock has no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) * parents, no selector is required and a null pointer is returned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) * Returns a null pointer if the clock names array supplied was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) * null. (This is not an error.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * Returns a pointer-coded error if an error occurs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) static u32 *parent_process(const char *clocks[],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) u32 *count, const char ***names)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) static const char **parent_names;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static u32 *parent_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) const char **clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) u32 parent_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) u32 bad_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) u32 orig_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) u32 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) u32 j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) *count = 0; /* In case of early return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) *names = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (!clocks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) * Count the number of names in the null-terminated array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) * and find out how many of those are actually clock names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) for (clock = clocks; *clock; clock++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) if (*clock == BAD_CLK_NAME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) bad_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) orig_count = (u32)(clock - clocks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) parent_count = orig_count - bad_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) /* If all clocks are unsupported, we treat it as no clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (!parent_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) /* Avoid exceeding our parent clock limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) if (parent_count > PARENT_COUNT_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) pr_err("%s: too many parents (%u > %u)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) parent_count, PARENT_COUNT_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) * There is one parent name for each defined parent clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) * We also maintain an array containing the selector value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) * for each defined clock. If there's only one clock, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) * selector is not required, but we allocate space for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) * array anyway to keep things simple.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) parent_names = kmalloc_array(parent_count, sizeof(*parent_names),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (!parent_names)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) /* There is at least one parent, so allocate a selector array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) parent_sel = kmalloc_array(parent_count, sizeof(*parent_sel),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (!parent_sel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) kfree(parent_names);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) /* Now fill in the parent names and selector arrays */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) for (i = 0, j = 0; i < orig_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) if (clocks[i] != BAD_CLK_NAME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) parent_names[j] = clocks[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) parent_sel[j] = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) j++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) *names = parent_names;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) *count = parent_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) return parent_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) clk_sel_setup(const char **clocks, struct bcm_clk_sel *sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) struct clk_init_data *init_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) const char **parent_names = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) u32 parent_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) u32 *parent_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) * If a peripheral clock has multiple parents, the value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) * used by the hardware to select that parent is represented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) * by the parent clock's position in the "clocks" list. Some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) * values don't have defined or supported clocks; these will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) * have BAD_CLK_NAME entries in the parents[] array. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) * list is terminated by a NULL entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) * We need to supply (only) the names of defined parent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) * clocks when registering a clock though, so we use an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) * array of parent selector values to map between the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) * indexes the common clock code uses and the selector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) * values we need.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) parent_sel = parent_process(clocks, &parent_count, &parent_names);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) if (IS_ERR(parent_sel)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) int ret = PTR_ERR(parent_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) pr_err("%s: error processing parent clocks for %s (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) __func__, init_data->name, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) init_data->parent_names = parent_names;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) init_data->num_parents = parent_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) sel->parent_count = parent_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) sel->parent_sel = parent_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static void clk_sel_teardown(struct bcm_clk_sel *sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) struct clk_init_data *init_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) kfree(sel->parent_sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) sel->parent_sel = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) sel->parent_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) init_data->num_parents = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) kfree(init_data->parent_names);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) init_data->parent_names = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static void peri_clk_teardown(struct peri_clk_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) struct clk_init_data *init_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) clk_sel_teardown(&data->sel, init_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) * Caller is responsible for freeing the parent_names[] and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) * parent_sel[] arrays in the peripheral clock's "data" structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) * that can be assigned if the clock has one or more parent clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) * associated with it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) peri_clk_setup(struct peri_clk_data *data, struct clk_init_data *init_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) init_data->flags = CLK_IGNORE_UNUSED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) return clk_sel_setup(data->clocks, &data->sel, init_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static void bcm_clk_teardown(struct kona_clk *bcm_clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) switch (bcm_clk->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) case bcm_clk_peri:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) peri_clk_teardown(bcm_clk->u.data, &bcm_clk->init_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) bcm_clk->u.data = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) bcm_clk->type = bcm_clk_none;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) static void kona_clk_teardown(struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) struct kona_clk *bcm_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) if (!hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) clk_hw_unregister(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) bcm_clk = to_kona_clk(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) bcm_clk_teardown(bcm_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) static int kona_clk_setup(struct kona_clk *bcm_clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) struct clk_init_data *init_data = &bcm_clk->init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) switch (bcm_clk->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) case bcm_clk_peri:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) ret = peri_clk_setup(bcm_clk->u.data, init_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) pr_err("%s: clock type %d invalid for %s\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) (int)bcm_clk->type, init_data->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) /* Make sure everything makes sense before we set it up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) if (!kona_clk_valid(bcm_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) pr_err("%s: clock data invalid for %s\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) init_data->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) goto out_teardown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) bcm_clk->hw.init = init_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) ret = clk_hw_register(NULL, &bcm_clk->hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) pr_err("%s: error registering clock %s (%d)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) init_data->name, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) goto out_teardown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) out_teardown:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) bcm_clk_teardown(bcm_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) static void ccu_clks_teardown(struct ccu_data *ccu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) u32 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) for (i = 0; i < ccu->clk_num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) kona_clk_teardown(&ccu->kona_clks[i].hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static void kona_ccu_teardown(struct ccu_data *ccu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) if (!ccu->base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) of_clk_del_provider(ccu->node); /* safe if never added */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) ccu_clks_teardown(ccu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) of_node_put(ccu->node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) ccu->node = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) iounmap(ccu->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) ccu->base = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) static bool ccu_data_valid(struct ccu_data *ccu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) struct ccu_policy *ccu_policy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) if (!ccu_data_offsets_valid(ccu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) ccu_policy = &ccu->policy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) if (ccu_policy_exists(ccu_policy))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) if (!ccu_policy_valid(ccu_policy, ccu->name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) static struct clk_hw *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) of_clk_kona_onecell_get(struct of_phandle_args *clkspec, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) struct ccu_data *ccu = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) unsigned int idx = clkspec->args[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) if (idx >= ccu->clk_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) pr_err("%s: invalid index %u\n", __func__, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) return &ccu->kona_clks[idx].hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) * Set up a CCU. Call the provided ccu_clks_setup callback to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) * initialize the array of clocks provided by the CCU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) void __init kona_dt_ccu_setup(struct ccu_data *ccu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) struct device_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) struct resource res = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) resource_size_t range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) ret = of_address_to_resource(node, 0, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) pr_err("%s: no valid CCU registers found for %pOFn\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) goto out_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) range = resource_size(&res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) if (range > (resource_size_t)U32_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) pr_err("%s: address range too large for %pOFn\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) goto out_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) ccu->range = (u32)range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) if (!ccu_data_valid(ccu)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) pr_err("%s: ccu data not valid for %pOFn\n", __func__, node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) goto out_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) ccu->base = ioremap(res.start, ccu->range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) if (!ccu->base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) pr_err("%s: unable to map CCU registers for %pOFn\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) goto out_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) ccu->node = of_node_get(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) * Set up each defined kona clock and save the result in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) * the clock framework clock array (in ccu->data). Then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) * register as a provider for these clocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) for (i = 0; i < ccu->clk_num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) if (!ccu->kona_clks[i].ccu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) kona_clk_setup(&ccu->kona_clks[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) ret = of_clk_add_hw_provider(node, of_clk_kona_onecell_get, ccu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) pr_err("%s: error adding ccu %pOFn as provider (%d)\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) node, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) goto out_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) if (!kona_ccu_init(ccu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) pr_err("Broadcom %pOFn initialization had errors\n", node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) out_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) kona_ccu_teardown(ccu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) pr_err("Broadcom %pOFn setup aborted\n", node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags