Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0+ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) // OWL gate clock driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) // Copyright (c) 2014 Actions Semi Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) // Author: David Liu <liuwei@actions-semi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) // Copyright (c) 2018 Linaro Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) // Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef _OWL_GATE_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define _OWL_GATE_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "owl-common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct owl_gate_hw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	u32			reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	u8			bit_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	u8			gate_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct owl_gate {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	struct owl_gate_hw	gate_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	struct owl_clk_common	common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define OWL_GATE_HW(_reg, _bit_idx, _gate_flags)	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	{						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		.reg		= _reg,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		.bit_idx	= _bit_idx,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		.gate_flags	= _gate_flags,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define OWL_GATE(_struct, _name, _parent, _reg,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		_bit_idx, _gate_flags, _flags)				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	struct owl_gate _struct = {					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		.gate_hw = OWL_GATE_HW(_reg, _bit_idx, _gate_flags),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		.common = {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 			.regmap		= NULL,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 			.hw.init	= CLK_HW_INIT(_name,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 						      _parent,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 						      &owl_gate_ops,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 						      _flags),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		}							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	}								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define OWL_GATE_NO_PARENT(_struct, _name, _reg,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		_bit_idx, _gate_flags, _flags)				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	struct owl_gate _struct = {					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		.gate_hw = OWL_GATE_HW(_reg, _bit_idx, _gate_flags),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		.common = {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 			.regmap		= NULL,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 			.hw.init	= CLK_HW_INIT_NO_PARENT(_name,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 						      &owl_gate_ops,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 						      _flags),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 		},							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	}								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static inline struct owl_gate *hw_to_owl_gate(const struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	struct owl_clk_common *common = hw_to_owl_clk_common(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	return container_of(common, struct owl_gate, common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) void owl_gate_set(const struct owl_clk_common *common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 		 const struct owl_gate_hw *gate_hw, bool enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int owl_gate_clk_is_enabled(const struct owl_clk_common *common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 		   const struct owl_gate_hw *gate_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) extern const struct clk_ops owl_gate_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #endif /* _OWL_GATE_H_ */