Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0+ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) // OWL divider clock driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) // Copyright (c) 2014 Actions Semi Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) // Author: David Liu <liuwei@actions-semi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) // Copyright (c) 2018 Linaro Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) // Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef _OWL_DIVIDER_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define _OWL_DIVIDER_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "owl-common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct owl_divider_hw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	u32			reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	u8			shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	u8			width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	u8			div_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	struct clk_div_table	*table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) struct owl_divider {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	struct owl_divider_hw	div_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	struct owl_clk_common	common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define OWL_DIVIDER_HW(_reg, _shift, _width, _div_flags, _table)	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	{								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		.reg		= _reg,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		.shift		= _shift,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		.width		= _width,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		.div_flags	= _div_flags,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		.table		= _table,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define OWL_DIVIDER(_struct, _name, _parent, _reg,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		    _shift, _width, _table, _div_flags, _flags)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	struct owl_divider _struct = {					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		.div_hw	= OWL_DIVIDER_HW(_reg, _shift, _width,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 					 _div_flags, _table),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		.common = {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 			.regmap		= NULL,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 			.hw.init	= CLK_HW_INIT(_name,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 						      _parent,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 						      &owl_divider_ops,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 						      _flags),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		},							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static inline struct owl_divider *hw_to_owl_divider(const struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	struct owl_clk_common *common = hw_to_owl_clk_common(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	return container_of(common, struct owl_divider, common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) long owl_divider_helper_round_rate(struct owl_clk_common *common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 				const struct owl_divider_hw *div_hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 				unsigned long rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 				unsigned long *parent_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned long owl_divider_helper_recalc_rate(struct owl_clk_common *common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 					 const struct owl_divider_hw *div_hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 					 unsigned long parent_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int owl_divider_helper_set_rate(const struct owl_clk_common *common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 				const struct owl_divider_hw *div_hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 				unsigned long rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 				unsigned long parent_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) extern const struct clk_ops owl_divider_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #endif /* _OWL_DIVIDER_H_ */