Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0+ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // OWL composite clock driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) // Copyright (c) 2014 Actions Semi Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) // Author: David Liu <liuwei@actions-semi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) // Copyright (c) 2018 Linaro Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) // Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #ifndef _OWL_COMPOSITE_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define _OWL_COMPOSITE_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include "owl-common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include "owl-mux.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include "owl-gate.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include "owl-factor.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include "owl-fixed-factor.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include "owl-divider.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) union owl_rate {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	struct owl_divider_hw	div_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	struct owl_factor_hw	factor_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	struct clk_fixed_factor	fix_fact_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) struct owl_composite {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	struct owl_mux_hw	mux_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	struct owl_gate_hw	gate_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	union owl_rate		rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	const struct clk_ops	*fix_fact_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct owl_clk_common	common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define OWL_COMP_DIV(_struct, _name, _parent,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		     _mux, _gate, _div, _flags)				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	struct owl_composite _struct = {				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		.mux_hw		= _mux,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		.gate_hw	= _gate,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		.rate.div_hw	= _div,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		.common = {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 			.regmap		= NULL,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 			.hw.init	= CLK_HW_INIT_PARENTS(_name,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 						     _parent,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 						      &owl_comp_div_ops,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 						     _flags),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		},							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define OWL_COMP_DIV_FIXED(_struct, _name, _parent,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		     _gate, _div, _flags)				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct owl_composite _struct = {				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		.gate_hw	= _gate,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		.rate.div_hw	= _div,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		.common = {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 			.regmap		= NULL,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 			.hw.init	= CLK_HW_INIT(_name,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 						     _parent,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 						      &owl_comp_div_ops,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 						     _flags),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		},							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define OWL_COMP_FACTOR(_struct, _name, _parent,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 			_mux, _gate, _factor, _flags)			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	struct owl_composite _struct = {				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		.mux_hw		= _mux,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		.gate_hw	= _gate,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		.rate.factor_hw	= _factor,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		.common = {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			.regmap		= NULL,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			.hw.init	= CLK_HW_INIT_PARENTS(_name,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 						     _parent,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 						     &owl_comp_fact_ops,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 						     _flags),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		},							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define OWL_COMP_FIXED_FACTOR(_struct, _name, _parent,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 			_gate, _mul, _div, _flags)			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	struct owl_composite _struct = {				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		.gate_hw		= _gate,			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		.rate.fix_fact_hw.mult	= _mul,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		.rate.fix_fact_hw.div	= _div,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		.fix_fact_ops		= &clk_fixed_factor_ops,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		.common = {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 			.regmap		= NULL,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 			.hw.init	= CLK_HW_INIT(_name,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 						 _parent,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 						 &owl_comp_fix_fact_ops,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 						 _flags),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		},							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define OWL_COMP_PASS(_struct, _name, _parent,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		      _mux, _gate, _flags)				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	struct owl_composite _struct = {				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		.mux_hw		= _mux,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		.gate_hw	= _gate,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		.common = {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 			.regmap		= NULL,				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 			.hw.init	= CLK_HW_INIT_PARENTS(_name,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 						     _parent,		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 						     &owl_comp_pass_ops,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 						     _flags),		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		},							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static inline struct owl_composite *hw_to_owl_comp(const struct clk_hw *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	struct owl_clk_common *common = hw_to_owl_clk_common(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	return container_of(common, struct owl_composite, common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) extern const struct clk_ops owl_comp_div_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) extern const struct clk_ops owl_comp_fact_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) extern const struct clk_ops owl_comp_fix_fact_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) extern const struct clk_ops owl_comp_pass_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) extern const struct clk_ops clk_fixed_factor_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #endif /* _OWL_COMPOSITE_H_ */