^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2014, 2015 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Maintained by: <tpmdd-devel@lists.sourceforge.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This file contains TPM2 protocol implementations of the commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * used by the kernel internally.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "tpm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <crypto/hash_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static struct tpm2_hash tpm2_hash_map[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) {HASH_ALGO_SHA1, TPM_ALG_SHA1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {HASH_ALGO_SHA256, TPM_ALG_SHA256},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {HASH_ALGO_SHA384, TPM_ALG_SHA384},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {HASH_ALGO_SHA512, TPM_ALG_SHA512},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) {HASH_ALGO_SM3_256, TPM_ALG_SM3_256},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) int tpm2_get_timeouts(struct tpm_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* Fixed timeouts for TPM2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) chip->timeout_a = msecs_to_jiffies(TPM2_TIMEOUT_A);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) chip->timeout_b = msecs_to_jiffies(TPM2_TIMEOUT_B);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) chip->timeout_c = msecs_to_jiffies(TPM2_TIMEOUT_C);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) chip->timeout_d = msecs_to_jiffies(TPM2_TIMEOUT_D);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* PTP spec timeouts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) chip->duration[TPM_SHORT] = msecs_to_jiffies(TPM2_DURATION_SHORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) chip->duration[TPM_MEDIUM] = msecs_to_jiffies(TPM2_DURATION_MEDIUM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) chip->duration[TPM_LONG] = msecs_to_jiffies(TPM2_DURATION_LONG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* Key creation commands long timeouts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) chip->duration[TPM_LONG_LONG] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) msecs_to_jiffies(TPM2_DURATION_LONG_LONG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) chip->flags |= TPM_CHIP_FLAG_HAVE_TIMEOUTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * tpm2_ordinal_duration_index() - returns an index to the chip duration table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * @ordinal: TPM command ordinal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * The function returns an index to the chip duration table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * (enum tpm_duration), that describes the maximum amount of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * time the chip could take to return the result for a particular ordinal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * The values of the MEDIUM, and LONG durations are taken
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * from the PC Client Profile (PTP) specification (750, 2000 msec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * LONG_LONG is for commands that generates keys which empirically takes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * a longer time on some systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * Return:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * * TPM_MEDIUM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * * TPM_LONG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * * TPM_LONG_LONG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * * TPM_UNDEFINED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static u8 tpm2_ordinal_duration_index(u32 ordinal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) switch (ordinal) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* Startup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) case TPM2_CC_STARTUP: /* 144 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return TPM_MEDIUM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) case TPM2_CC_SELF_TEST: /* 143 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return TPM_LONG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) case TPM2_CC_GET_RANDOM: /* 17B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return TPM_LONG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) case TPM2_CC_SEQUENCE_UPDATE: /* 15C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return TPM_MEDIUM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) case TPM2_CC_SEQUENCE_COMPLETE: /* 13E */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return TPM_MEDIUM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) case TPM2_CC_EVENT_SEQUENCE_COMPLETE: /* 185 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return TPM_MEDIUM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) case TPM2_CC_HASH_SEQUENCE_START: /* 186 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return TPM_MEDIUM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) case TPM2_CC_VERIFY_SIGNATURE: /* 177 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return TPM_LONG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) case TPM2_CC_PCR_EXTEND: /* 182 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return TPM_MEDIUM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) case TPM2_CC_HIERARCHY_CONTROL: /* 121 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return TPM_LONG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) case TPM2_CC_HIERARCHY_CHANGE_AUTH: /* 129 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return TPM_LONG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) case TPM2_CC_GET_CAPABILITY: /* 17A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return TPM_MEDIUM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) case TPM2_CC_NV_READ: /* 14E */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return TPM_LONG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) case TPM2_CC_CREATE_PRIMARY: /* 131 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return TPM_LONG_LONG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) case TPM2_CC_CREATE: /* 153 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return TPM_LONG_LONG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) case TPM2_CC_CREATE_LOADED: /* 191 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return TPM_LONG_LONG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return TPM_UNDEFINED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * tpm2_calc_ordinal_duration() - calculate the maximum command duration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * @chip: TPM chip to use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * @ordinal: TPM command ordinal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * The function returns the maximum amount of time the chip could take
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * to return the result for a particular ordinal in jiffies.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * Return: A maximal duration time for an ordinal in jiffies.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unsigned long tpm2_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) unsigned int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) index = tpm2_ordinal_duration_index(ordinal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (index != TPM_UNDEFINED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return chip->duration[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return msecs_to_jiffies(TPM2_DURATION_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct tpm2_pcr_read_out {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) __be32 update_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) __be32 pcr_selects_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) __be16 hash_alg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) u8 pcr_select_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) u8 pcr_select[TPM2_PCR_SELECT_MIN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) __be32 digests_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) __be16 digest_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) u8 digest[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * tpm2_pcr_read() - read a PCR value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * @chip: TPM chip to use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * @pcr_idx: index of the PCR to read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * @digest: PCR bank and buffer current PCR value is written to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * @digest_size_ptr: pointer to variable that stores the digest size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * Return: Same as with tpm_transmit_cmd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) int tpm2_pcr_read(struct tpm_chip *chip, u32 pcr_idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) struct tpm_digest *digest, u16 *digest_size_ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct tpm_buf buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct tpm2_pcr_read_out *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) u8 pcr_select[TPM2_PCR_SELECT_MIN] = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) u16 digest_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) u16 expected_digest_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (pcr_idx >= TPM2_PLATFORM_PCR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (!digest_size_ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) for (i = 0; i < chip->nr_allocated_banks &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) chip->allocated_banks[i].alg_id != digest->alg_id; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (i == chip->nr_allocated_banks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) expected_digest_size = chip->allocated_banks[i].digest_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_PCR_READ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) pcr_select[pcr_idx >> 3] = 1 << (pcr_idx & 0x7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) tpm_buf_append_u32(&buf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) tpm_buf_append_u16(&buf, digest->alg_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) tpm_buf_append_u8(&buf, TPM2_PCR_SELECT_MIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) tpm_buf_append(&buf, (const unsigned char *)pcr_select,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) sizeof(pcr_select));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) rc = tpm_transmit_cmd(chip, &buf, 0, "attempting to read a pcr value");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) out = (struct tpm2_pcr_read_out *)&buf.data[TPM_HEADER_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) digest_size = be16_to_cpu(out->digest_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (digest_size > sizeof(digest->digest) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) (!digest_size_ptr && digest_size != expected_digest_size)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (digest_size_ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) *digest_size_ptr = digest_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) memcpy(digest->digest, out->digest, digest_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct tpm2_null_auth_area {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) __be32 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) __be16 nonce_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) u8 attributes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) __be16 auth_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * tpm2_pcr_extend() - extend a PCR value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * @chip: TPM chip to use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * @pcr_idx: index of the PCR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * @digests: list of pcr banks and corresponding digest values to extend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * Return: Same as with tpm_transmit_cmd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) int tpm2_pcr_extend(struct tpm_chip *chip, u32 pcr_idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct tpm_digest *digests)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct tpm_buf buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct tpm2_null_auth_area auth_area;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) rc = tpm_buf_init(&buf, TPM2_ST_SESSIONS, TPM2_CC_PCR_EXTEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) tpm_buf_append_u32(&buf, pcr_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) auth_area.handle = cpu_to_be32(TPM2_RS_PW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) auth_area.nonce_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) auth_area.attributes = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) auth_area.auth_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) tpm_buf_append_u32(&buf, sizeof(struct tpm2_null_auth_area));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) tpm_buf_append(&buf, (const unsigned char *)&auth_area,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) sizeof(auth_area));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) tpm_buf_append_u32(&buf, chip->nr_allocated_banks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) for (i = 0; i < chip->nr_allocated_banks; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) tpm_buf_append_u16(&buf, digests[i].alg_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) tpm_buf_append(&buf, (const unsigned char *)&digests[i].digest,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) chip->allocated_banks[i].digest_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) rc = tpm_transmit_cmd(chip, &buf, 0, "attempting extend a PCR value");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct tpm2_get_random_out {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) __be16 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u8 buffer[TPM_MAX_RNG_DATA];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * tpm2_get_random() - get random bytes from the TPM RNG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * @chip: a &tpm_chip instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * @dest: destination buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) * @max: the max number of random bytes to pull
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * Return:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * size of the buffer on success,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * -errno otherwise (positive TPM return codes are masked to -EIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int tpm2_get_random(struct tpm_chip *chip, u8 *dest, size_t max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) struct tpm2_get_random_out *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct tpm_buf buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) u32 recd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) u32 num_bytes = max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) int total = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) int retries = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) u8 *dest_ptr = dest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (!num_bytes || max > TPM_MAX_RNG_DATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) err = tpm_buf_init(&buf, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) tpm_buf_reset(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_RANDOM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) tpm_buf_append_u16(&buf, num_bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) err = tpm_transmit_cmd(chip, &buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) offsetof(struct tpm2_get_random_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) buffer),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) "attempting get random");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (err > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) err = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) out = (struct tpm2_get_random_out *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) &buf.data[TPM_HEADER_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) recd = min_t(u32, be16_to_cpu(out->size), num_bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) if (tpm_buf_length(&buf) <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) TPM_HEADER_SIZE +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) offsetof(struct tpm2_get_random_out, buffer) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) recd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) err = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) memcpy(dest_ptr, out->buffer, recd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) dest_ptr += recd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) total += recd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) num_bytes -= recd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) } while (retries-- && total < max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return total ? total : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * tpm2_flush_context() - execute a TPM2_FlushContext command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * @chip: TPM chip to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) * @handle: context handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) void tpm2_flush_context(struct tpm_chip *chip, u32 handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct tpm_buf buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_FLUSH_CONTEXT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) dev_warn(&chip->dev, "0x%08x was not flushed, out of memory\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) tpm_buf_append_u32(&buf, handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) tpm_transmit_cmd(chip, &buf, 0, "flushing context");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) EXPORT_SYMBOL_GPL(tpm2_flush_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) struct tpm2_get_cap_out {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) u8 more_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) __be32 subcap_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) __be32 property_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) __be32 property_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) __be32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * tpm2_get_tpm_pt() - get value of a TPM_CAP_TPM_PROPERTIES type property
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * @chip: a &tpm_chip instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * @property_id: property ID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * @value: output variable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * @desc: passed to tpm_transmit_cmd()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) * Return:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) * 0 on success,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) * -errno or a TPM return code otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) ssize_t tpm2_get_tpm_pt(struct tpm_chip *chip, u32 property_id, u32 *value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) const char *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) struct tpm2_get_cap_out *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) struct tpm_buf buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) tpm_buf_append_u32(&buf, TPM2_CAP_TPM_PROPERTIES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) tpm_buf_append_u32(&buf, property_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) tpm_buf_append_u32(&buf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) rc = tpm_transmit_cmd(chip, &buf, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (!rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) out = (struct tpm2_get_cap_out *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) &buf.data[TPM_HEADER_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) *value = be32_to_cpu(out->value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) EXPORT_SYMBOL_GPL(tpm2_get_tpm_pt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * tpm2_shutdown() - send a TPM shutdown command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * Sends a TPM shutdown command. The shutdown command is used in call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * sites where the system is going down. If it fails, there is not much
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * that can be done except print an error message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) * @chip: a &tpm_chip instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) * @shutdown_type: TPM_SU_CLEAR or TPM_SU_STATE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) void tpm2_shutdown(struct tpm_chip *chip, u16 shutdown_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) struct tpm_buf buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_SHUTDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) tpm_buf_append_u16(&buf, shutdown_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) tpm_transmit_cmd(chip, &buf, 0, "stopping the TPM");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) * tpm2_do_selftest() - ensure that all self tests have passed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) * @chip: TPM chip to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) * Return: Same as with tpm_transmit_cmd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) * The TPM can either run all self tests synchronously and then return
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) * RC_SUCCESS once all tests were successful. Or it can choose to run the tests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) * asynchronously and return RC_TESTING immediately while the self tests still
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) * execute in the background. This function handles both cases and waits until
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * all tests have completed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static int tpm2_do_selftest(struct tpm_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) struct tpm_buf buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) int full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) for (full = 0; full < 2; full++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_SELF_TEST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) tpm_buf_append_u8(&buf, full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) rc = tpm_transmit_cmd(chip, &buf, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) "attempting the self test");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) if (rc == TPM2_RC_TESTING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) rc = TPM2_RC_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) if (rc == TPM2_RC_INITIALIZE || rc == TPM2_RC_SUCCESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) * tpm2_probe() - probe for the TPM 2.0 protocol
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) * @chip: a &tpm_chip instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) * Send an idempotent TPM 2.0 command and see whether there is TPM2 chip in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) * other end based on the response tag. The flag TPM_CHIP_FLAG_TPM2 is set by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) * this function if this is the case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) * Return:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) * 0 on success,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) * -errno otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) int tpm2_probe(struct tpm_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) struct tpm_header *out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) struct tpm_buf buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) tpm_buf_append_u32(&buf, TPM2_CAP_TPM_PROPERTIES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) tpm_buf_append_u32(&buf, TPM_PT_TOTAL_COMMANDS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) tpm_buf_append_u32(&buf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) rc = tpm_transmit_cmd(chip, &buf, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) /* We ignore TPM return codes on purpose. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) if (rc >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) out = (struct tpm_header *)buf.data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) if (be16_to_cpu(out->tag) == TPM2_ST_NO_SESSIONS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) chip->flags |= TPM_CHIP_FLAG_TPM2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) EXPORT_SYMBOL_GPL(tpm2_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static int tpm2_init_bank_info(struct tpm_chip *chip, u32 bank_index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) struct tpm_bank_info *bank = chip->allocated_banks + bank_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) struct tpm_digest digest = { .alg_id = bank->alg_id };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) * Avoid unnecessary PCR read operations to reduce overhead
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) * and obtain identifiers of the crypto subsystem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) for (i = 0; i < ARRAY_SIZE(tpm2_hash_map); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) enum hash_algo crypto_algo = tpm2_hash_map[i].crypto_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (bank->alg_id != tpm2_hash_map[i].tpm_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) bank->digest_size = hash_digest_size[crypto_algo];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) bank->crypto_id = crypto_algo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) bank->crypto_id = HASH_ALGO__LAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) return tpm2_pcr_read(chip, 0, &digest, &bank->digest_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) struct tpm2_pcr_selection {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) __be16 hash_alg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) u8 size_of_select;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) u8 pcr_select[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) ssize_t tpm2_get_pcr_allocation(struct tpm_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) struct tpm2_pcr_selection pcr_selection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) struct tpm_buf buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) void *marker;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) void *end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) void *pcr_select_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) u32 sizeof_pcr_selection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) u32 nr_possible_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) u32 nr_alloc_banks = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) u16 hash_alg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) u32 rsp_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) tpm_buf_append_u32(&buf, TPM2_CAP_PCRS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) tpm_buf_append_u32(&buf, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) tpm_buf_append_u32(&buf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) rc = tpm_transmit_cmd(chip, &buf, 9, "get tpm pcr allocation");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) nr_possible_banks = be32_to_cpup(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) (__be32 *)&buf.data[TPM_HEADER_SIZE + 5]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) chip->allocated_banks = kcalloc(nr_possible_banks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) sizeof(*chip->allocated_banks),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (!chip->allocated_banks) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) marker = &buf.data[TPM_HEADER_SIZE + 9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) rsp_len = be32_to_cpup((__be32 *)&buf.data[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) end = &buf.data[rsp_len];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) for (i = 0; i < nr_possible_banks; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) pcr_select_offset = marker +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) offsetof(struct tpm2_pcr_selection, size_of_select);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (pcr_select_offset >= end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) rc = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) memcpy(&pcr_selection, marker, sizeof(pcr_selection));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) hash_alg = be16_to_cpu(pcr_selection.hash_alg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) pcr_select_offset = memchr_inv(pcr_selection.pcr_select, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) pcr_selection.size_of_select);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if (pcr_select_offset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) chip->allocated_banks[nr_alloc_banks].alg_id = hash_alg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) rc = tpm2_init_bank_info(chip, nr_alloc_banks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) nr_alloc_banks++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) sizeof_pcr_selection = sizeof(pcr_selection.hash_alg) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) sizeof(pcr_selection.size_of_select) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) pcr_selection.size_of_select;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) marker = marker + sizeof_pcr_selection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) chip->nr_allocated_banks = nr_alloc_banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) int tpm2_get_cc_attrs_tbl(struct tpm_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) struct tpm_buf buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) u32 nr_commands;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) __be32 *attrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) u32 cc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) rc = tpm2_get_tpm_pt(chip, TPM_PT_TOTAL_COMMANDS, &nr_commands, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) if (nr_commands > 0xFFFFF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) rc = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) chip->cc_attrs_tbl = devm_kcalloc(&chip->dev, 4, nr_commands,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) if (!chip->cc_attrs_tbl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) tpm_buf_append_u32(&buf, TPM2_CAP_COMMANDS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) tpm_buf_append_u32(&buf, TPM2_CC_FIRST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) tpm_buf_append_u32(&buf, nr_commands);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) rc = tpm_transmit_cmd(chip, &buf, 9 + 4 * nr_commands, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) if (nr_commands !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) be32_to_cpup((__be32 *)&buf.data[TPM_HEADER_SIZE + 5])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) rc = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) chip->nr_commands = nr_commands;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) attrs = (__be32 *)&buf.data[TPM_HEADER_SIZE + 9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) for (i = 0; i < nr_commands; i++, attrs++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) chip->cc_attrs_tbl[i] = be32_to_cpup(attrs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) cc = chip->cc_attrs_tbl[i] & 0xFFFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) if (cc == TPM2_CC_CONTEXT_SAVE || cc == TPM2_CC_FLUSH_CONTEXT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) chip->cc_attrs_tbl[i] &=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) ~(GENMASK(2, 0) << TPM2_CC_ATTR_CHANDLES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) chip->cc_attrs_tbl[i] |= 1 << TPM2_CC_ATTR_CHANDLES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) if (rc > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) rc = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) EXPORT_SYMBOL_GPL(tpm2_get_cc_attrs_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) * tpm2_startup - turn on the TPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) * @chip: TPM chip to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) * Normally the firmware should start the TPM. This function is provided as a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) * workaround if this does not happen. A legal case for this could be for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) * example when a TPM emulator is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) * Return: same as tpm_transmit_cmd()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) static int tpm2_startup(struct tpm_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) struct tpm_buf buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) dev_info(&chip->dev, "starting up the TPM manually\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_STARTUP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) tpm_buf_append_u16(&buf, TPM2_SU_CLEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) rc = tpm_transmit_cmd(chip, &buf, 0, "attempting to start the TPM");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) tpm_buf_destroy(&buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) * tpm2_auto_startup - Perform the standard automatic TPM initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) * sequence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) * @chip: TPM chip to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) * Returns 0 on success, < 0 in case of fatal error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) int tpm2_auto_startup(struct tpm_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) rc = tpm2_get_timeouts(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) rc = tpm2_do_selftest(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) if (rc && rc != TPM2_RC_INITIALIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) if (rc == TPM2_RC_INITIALIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) rc = tpm2_startup(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) rc = tpm2_do_selftest(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) rc = tpm2_get_cc_attrs_tbl(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) if (rc > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) rc = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) int tpm2_find_cc(struct tpm_chip *chip, u32 cc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) for (i = 0; i < chip->nr_commands; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) if (cc == (chip->cc_attrs_tbl[i] & GENMASK(15, 0)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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