^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* linux/drivers/char/scx200_gpio.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) National Semiconductor SCx200 GPIO driver. Allows a user space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) process to play with the GPIO pins.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/cdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/scx200_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/nsc_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define DRVNAME "scx200_gpio"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MODULE_DESCRIPTION("NatSemi/AMD SCx200 GPIO Pin Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static int major = 0; /* default to dynamic major */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) module_param(major, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MODULE_PARM_DESC(major, "Major device number");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define MAX_PINS 32 /* 64 later, when known ok */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct nsc_gpio_ops scx200_gpio_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .gpio_config = scx200_gpio_configure,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .gpio_dump = nsc_gpio_dump,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .gpio_get = scx200_gpio_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .gpio_set = scx200_gpio_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .gpio_change = scx200_gpio_change,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .gpio_current = scx200_gpio_current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) EXPORT_SYMBOL_GPL(scx200_gpio_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int scx200_gpio_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) unsigned m = iminor(inode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) file->private_data = &scx200_gpio_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) if (m >= MAX_PINS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return nonseekable_open(inode, file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static int scx200_gpio_release(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static const struct file_operations scx200_gpio_fileops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .write = nsc_gpio_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .read = nsc_gpio_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .open = scx200_gpio_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .release = scx200_gpio_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .llseek = no_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static struct cdev scx200_gpio_cdev; /* use 1 cdev for all pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int __init scx200_gpio_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) dev_t devid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (!scx200_gpio_present()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) printk(KERN_ERR DRVNAME ": no SCx200 gpio present\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* support dev_dbg() with pdev->dev */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) pdev = platform_device_alloc(DRVNAME, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (!pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) rc = platform_device_add(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) goto undo_malloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* nsc_gpio uses dev_dbg(), so needs this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) scx200_gpio_ops.dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (major) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) devid = MKDEV(major, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) rc = register_chrdev_region(devid, MAX_PINS, "scx200_gpio");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) rc = alloc_chrdev_region(&devid, 0, MAX_PINS, "scx200_gpio");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) major = MAJOR(devid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) dev_err(&pdev->dev, "SCx200 chrdev_region err: %d\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) goto undo_platform_device_add;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) cdev_init(&scx200_gpio_cdev, &scx200_gpio_fileops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) cdev_add(&scx200_gpio_cdev, devid, MAX_PINS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return 0; /* succeed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) undo_platform_device_add:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) platform_device_del(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) undo_malloc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) platform_device_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static void __exit scx200_gpio_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) cdev_del(&scx200_gpio_cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* cdev_put(&scx200_gpio_cdev); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unregister_chrdev_region(MKDEV(major, 0), MAX_PINS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) platform_device_unregister(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) module_init(scx200_gpio_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) module_exit(scx200_gpio_cleanup);