Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Flash memory interface rev.5 driver for the Intel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Flash chips used on the NetWinder.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * 20/08/2000	RMK	use __ioremap to map flash into virtual memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *			make a few more places use "volatile"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * 22/05/2001	RMK	- Lock read against write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *			- merge printk level changes (with mods) from Alan Cox.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *			- use *ppos as the file position, not file->f_pos.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *			- fix check for out of range pos and r/w size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * Please note that we are tampering with the only flash chip in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * machine, which contains the bootup code.  We therefore have the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * power to convert these machines into doorstops...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/proc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/miscdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/rwsem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <asm/hardware/dec21285.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) /*****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #include <asm/nwflash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define	NWFLASH_VERSION "6.4"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static DEFINE_MUTEX(flash_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) static void kick_open(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) static int get_flash_id(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static int erase_block(int nBlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static int write_block(unsigned long p, const char __user *buf, int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define KFLASH_SIZE	1024*1024	//1 Meg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define KFLASH_SIZE4	4*1024*1024	//4 Meg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define KFLASH_ID	0x89A6		//Intel flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define KFLASH_ID4	0xB0D4		//Intel flash 4Meg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static bool flashdebug;		//if set - we will display progress msgs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) static int gbWriteEnable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) static int gbWriteBase64Enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static volatile unsigned char *FLASH_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static int gbFlashSize = KFLASH_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static DEFINE_MUTEX(nwflash_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static int get_flash_id(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	volatile unsigned int c1, c2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	 * try to get flash chip ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	kick_open();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	c2 = inb(0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x90;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	udelay(15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	c1 = *(volatile unsigned char *) FLASH_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	c2 = inb(0x80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	 * on 4 Meg flash the second byte is actually at offset 2...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	if (c1 == 0xB0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		c2 = *(volatile unsigned char *) (FLASH_BASE + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		c2 = *(volatile unsigned char *) (FLASH_BASE + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	c2 += (c1 << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	 * set it back to read mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if (c2 == KFLASH_ID4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		gbFlashSize = KFLASH_SIZE4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	return c2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) static long flash_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	mutex_lock(&flash_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	case CMD_WRITE_DISABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		gbWriteBase64Enable = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		gbWriteEnable = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	case CMD_WRITE_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		gbWriteEnable = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	case CMD_WRITE_BASE64K_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		gbWriteBase64Enable = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		gbWriteBase64Enable = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		gbWriteEnable = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		mutex_unlock(&flash_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	mutex_unlock(&flash_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static ssize_t flash_read(struct file *file, char __user *buf, size_t size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			  loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	ssize_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (flashdebug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		printk(KERN_DEBUG "flash_read: flash_read: offset=0x%llx, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		       "buffer=%p, count=0x%zx.\n", *ppos, buf, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	 * We now lock against reads and writes. --rmk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	if (mutex_lock_interruptible(&nwflash_mutex))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		return -ERESTARTSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	ret = simple_read_from_buffer(buf, size, ppos, (void *)FLASH_BASE, gbFlashSize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	mutex_unlock(&nwflash_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static ssize_t flash_write(struct file *file, const char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 			   size_t size, loff_t * ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	unsigned long p = *ppos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	unsigned int count = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	int written;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	int nBlock, temp, rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	if (flashdebug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		       p, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	if (!gbWriteEnable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	if (p < 64 * 1024 && (!gbWriteBase64Enable))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	 * check for out of range pos or count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	if (p >= gbFlashSize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		return count ? -ENXIO : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	if (count > gbFlashSize - p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		count = gbFlashSize - p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	if (!access_ok(buf, count))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	 * We now lock against reads and writes. --rmk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	if (mutex_lock_interruptible(&nwflash_mutex))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		return -ERESTARTSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	written = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	nBlock = (int) p >> 16;	//block # of 64K bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	 * # of 64K blocks to erase and write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	temp = ((int) (p + count) >> 16) - nBlock + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	 * write ends at exactly 64k boundary?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	if (((int) (p + count) & 0xFFFF) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		temp -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	if (flashdebug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		printk(KERN_DEBUG "flash_write: writing %d block(s) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 			"starting at %d.\n", temp, nBlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	for (; temp; temp--, nBlock++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		if (flashdebug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			printk(KERN_DEBUG "flash_write: erasing block %d.\n", nBlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		 * first we have to erase the block(s), where we will write...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		j = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	  RetryBlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 			rc = erase_block(nBlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 			i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		} while (rc && i < 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 			printk(KERN_ERR "flash_write: erase error %x\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		if (flashdebug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			printk(KERN_DEBUG "flash_write: writing offset %lX, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 			       "from buf %p, bytes left %X.\n", p, buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 			       count - written);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		 * write_block will limit write to space left in this block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		rc = write_block(p, buf, count - written);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		j++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		 * if somehow write verify failed? Can't happen??
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		if (!rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 			 * retry up to 10 times
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			if (j < 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 				goto RetryBlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 				/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 				 * else quit with error...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 				 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 				rc = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 			printk(KERN_ERR "flash_write: write error %X\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		p += rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		buf += rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		written += rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		*ppos += rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		if (flashdebug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 			printk(KERN_DEBUG "flash_write: written 0x%X bytes OK.\n", written);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	mutex_unlock(&nwflash_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	return written;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)  * The memory devices use the full 32/64 bits of the offset, and so we cannot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)  * check against negative addresses: they are ok. The return value is weird,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)  * though, in that case (0).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)  * also note that seeking relative to the "end of file" isn't supported:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)  * it has no meaning, so it returns -EINVAL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static loff_t flash_llseek(struct file *file, loff_t offset, int orig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	loff_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	mutex_lock(&flash_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	if (flashdebug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		       (unsigned int) offset, orig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	ret = no_seek_end_llseek_size(file, offset, orig, gbFlashSize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	mutex_unlock(&flash_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)  * assume that main Write routine did the parameter checking...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)  * so just go ahead and erase, what requested!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static int erase_block(int nBlock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	volatile unsigned int c1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	volatile unsigned char *pWritePtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	unsigned long timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	int temp, temp1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	 * reset footbridge to the correct offset 0 (...0..3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	*CSR_ROMWRITEREG = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	 * dummy ROM read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	kick_open();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	 * reset status if old errors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	 * erase a block...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	 * aim at the middle of a current block...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + 0x8000 + (nBlock << 16)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	 * dummy read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	c1 = *pWritePtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	kick_open();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	 * erase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	*(volatile unsigned char *) pWritePtr = 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	 * confirm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	*(volatile unsigned char *) pWritePtr = 0xD0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	 * wait 10 ms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	 * wait while erasing in process (up to 10 sec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	timeout = jiffies + 10 * HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	c1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	while (!(c1 & 0x80) && time_before(jiffies, timeout)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 		 * read any address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		c1 = *(volatile unsigned char *) (pWritePtr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 		//              printk("Flash_erase: status=%X.\n",c1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	 * set flash for normal read access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	kick_open();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) //      *(volatile unsigned char*)(FLASH_BASE+0x8000) = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	*(volatile unsigned char *) pWritePtr = 0xFF;	//back to normal operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	 * check if erase errors were reported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	if (c1 & 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		printk(KERN_ERR "flash_erase: err at %p\n", pWritePtr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		 * reset error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 		*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 		return -2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	 * just to make sure - verify if erased OK...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + (nBlock << 16)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	for (temp = 0; temp < 16 * 1024; temp++, pWritePtr += 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		if ((temp1 = *(volatile unsigned int *) pWritePtr) != 0xFFFFFFFF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 			printk(KERN_ERR "flash_erase: verify err at %p = %X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 			       pWritePtr, temp1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 			return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)  * write_block will limit number of bytes written to the space in this block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static int write_block(unsigned long p, const char __user *buf, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	volatile unsigned int c1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	volatile unsigned int c2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	unsigned char *pWritePtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	unsigned int uAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	unsigned int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	unsigned long timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	unsigned long timeout1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	 * check if write will end in this block....
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	offset = p & 0xFFFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	if (offset + count > 0x10000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 		count = 0x10000 - offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	 * wait up to 30 sec for this block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	timeout = jiffies + 30 * HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	for (offset = 0; offset < count; offset++, pWritePtr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 		uAddress = (unsigned int) pWritePtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 		uAddress &= 0xFFFFFFFC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 		if (__get_user(c2, buf + offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	  WriteRetry:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	  	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	  	 * dummy read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	  	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 		c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 		 * kick open the write gate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 		kick_open();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 		 * program footbridge to the correct offset...0..3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 		*CSR_ROMWRITEREG = (unsigned int) pWritePtr & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 		 * write cmd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 		*(volatile unsigned char *) (uAddress) = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 		 * data to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 		*(volatile unsigned char *) (uAddress) = c2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 		 * get status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 		*(volatile unsigned char *) (FLASH_BASE + 0x10000) = 0x70;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 		c1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 		 * wait up to 1 sec for this byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 		timeout1 = jiffies + 1 * HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 		 * while not ready...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 		while (!(c1 & 0x80) && time_before(jiffies, timeout1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 			c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 		 * if timeout getting status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 		if (time_after_eq(jiffies, timeout1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 			kick_open();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 			 * reset err
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 			*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 			goto WriteRetry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 		 * switch on read access, as a default flash operation mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 		kick_open();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 		 * read access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 		*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 		 * if hardware reports an error writing, and not timeout - 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 		 * reset the chip and retry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 		if (c1 & 0x10) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 			kick_open();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 			 * reset err
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 			*(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 			 * before timeout?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 			if (time_before(jiffies, timeout)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 				if (flashdebug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 					printk(KERN_DEBUG "write_block: Retrying write at 0x%X)n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 					       pWritePtr - FLASH_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 				/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 				 * wait couple ms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 				 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 				msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 				goto WriteRetry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 			} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 				printk(KERN_ERR "write_block: timeout at 0x%X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 				       pWritePtr - FLASH_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 				/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 				 * return error -2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 				 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 				return -2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	for (offset = 0; offset < count; offset++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 		char c, c1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 		if (__get_user(c, buf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 		buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 		if ((c1 = *pWritePtr++) != c) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 			printk(KERN_ERR "write_block: verify error at 0x%X (%02X!=%02X)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 			       pWritePtr - FLASH_BASE, c1, c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 	return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) static void kick_open(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	 * we want to write a bit pattern XXX1 to Xilinx to enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	 * the write gate, which will be open for about the next 2ms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	raw_spin_lock_irqsave(&nw_gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 	raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 	 * let the ISA bus to catch on...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 	udelay(25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) static const struct file_operations flash_fops =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 	.owner		= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 	.llseek		= flash_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 	.read		= flash_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 	.write		= flash_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 	.unlocked_ioctl	= flash_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) static struct miscdevice flash_miscdev =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 	NWFLASH_MINOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 	"nwflash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 	&flash_fops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) static int __init nwflash_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 	int ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 	if (machine_is_netwinder()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 		int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 		FLASH_BASE = ioremap(DC21285_FLASH, KFLASH_SIZE4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 		if (!FLASH_BASE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 		id = get_flash_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 		if ((id != KFLASH_ID) && (id != KFLASH_ID4)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 			ret = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 			iounmap((void *)FLASH_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 			printk("Flash: incorrect ID 0x%04X.\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 		printk("Flash ROM driver v.%s, flash device ID 0x%04X, size %d Mb.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 		       NWFLASH_VERSION, id, gbFlashSize / (1024 * 1024));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 		ret = misc_register(&flash_miscdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 		if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 			iounmap((void *)FLASH_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) static void __exit nwflash_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) 	misc_deregister(&flash_miscdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) 	iounmap((void *)FLASH_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) module_param(flashdebug, bool, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) module_init(nwflash_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) module_exit(nwflash_exit);