^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * mwavedd.h -- declarations for mwave device driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Written By: Mike Sullivan IBM Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 1999 IBM Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * the Free Software Foundation; either version 2 of the License, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * (at your option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * NO WARRANTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * solely responsible for determining the appropriateness of using and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * distributing the Program and assumes all risks associated with its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * exercise of rights under this Agreement, including but not limited to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * the risks and costs of program errors, damage to or loss of data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * programs or equipment, and unavailability or interruption of operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * DISCLAIMER OF LIABILITY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * along with this program; if not, write to the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * 10/23/2000 - Alpha Release
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * First release to the public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #ifndef _LINUX_MWAVEDD_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define _LINUX_MWAVEDD_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include "3780i.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include "tp3780i.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include "smapi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include "mwavepub.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <linux/ioctl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) extern int mwave_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) extern int mwave_3780i_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) extern int mwave_3780i_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) extern int mwave_uart_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) extern int mwave_uart_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PRINTK_ERROR printk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define KERN_ERR_MWAVE KERN_ERR "mwave: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define TRACE_MWAVE 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define TRACE_SMAPI 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define TRACE_3780I 0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define TRACE_TP3780I 0x0008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #ifdef MW_TRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define PRINTK_1(f,s) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (f & (mwave_debug)) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) printk(s); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define PRINTK_2(f,s,v1) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (f & (mwave_debug)) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) printk(s,v1); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define PRINTK_3(f,s,v1,v2) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (f & (mwave_debug)) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) printk(s,v1,v2); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define PRINTK_4(f,s,v1,v2,v3) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (f & (mwave_debug)) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) printk(s,v1,v2,v3); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define PRINTK_5(f,s,v1,v2,v3,v4) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (f & (mwave_debug)) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) printk(s,v1,v2,v3,v4); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (f & (mwave_debug)) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) printk(s,v1,v2,v3,v4,v5); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (f & (mwave_debug)) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) printk(s,v1,v2,v3,v4,v5,v6); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (f & (mwave_debug)) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) printk(s,v1,v2,v3,v4,v5,v6,v7); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define PRINTK_1(f,s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define PRINTK_2(f,s,v1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define PRINTK_3(f,s,v1,v2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define PRINTK_4(f,s,v1,v2,v3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define PRINTK_5(f,s,v1,v2,v3,v4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define PRINTK_6(f,s,v1,v2,v3,v4,v5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) typedef struct _MWAVE_IPC {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned short usIntCount; /* 0=none, 1=first, 2=greater than 1st */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) bool bIsEnabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) bool bIsHere;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* entry spin lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) wait_queue_head_t ipc_wait_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) } MWAVE_IPC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) typedef struct _MWAVE_DEVICE_DATA {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) THINKPAD_BD_DATA rBDData; /* board driver's data area */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) unsigned long ulIPCSource_ISR; /* IPC source bits for recently processed intr, set during ISR processing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) unsigned long ulIPCSource_DPC; /* IPC source bits for recently processed intr, set during DPC processing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) bool bBDInitialized;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) bool bResourcesClaimed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) bool bDSPEnabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) bool bDSPReset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MWAVE_IPC IPCs[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) bool bMwaveDevRegistered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) short sLine;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int nr_registered_attrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) int device_registered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) } MWAVE_DEVICE_DATA, *pMWAVE_DEVICE_DATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) extern MWAVE_DEVICE_DATA mwave_s_mdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #endif