Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * ST Random Number Generator Driver ST's Platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Author: Pankaj Dev: <pankaj.dev@st.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *         Lee Jones <lee.jones@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Copyright (C) 2015 STMicroelectronics (R&D) Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/hw_random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) /* Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define ST_RNG_STATUS_REG		0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define ST_RNG_DATA_REG			0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /* Registers fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define ST_RNG_STATUS_BAD_SEQUENCE	BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define ST_RNG_STATUS_BAD_ALTERNANCE	BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define ST_RNG_STATUS_FIFO_FULL		BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define ST_RNG_SAMPLE_SIZE		2 /* 2 Byte (16bit) samples */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define ST_RNG_FIFO_DEPTH		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define ST_RNG_FIFO_SIZE		(ST_RNG_FIFO_DEPTH * ST_RNG_SAMPLE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * Samples are documented to be available every 0.667us, so in theory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  * the 4 sample deep FIFO should take 2.668us to fill.  However, during
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * thorough testing, it became apparent that filling the FIFO actually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * takes closer to 12us.  We then multiply by 2 in order to account for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * the lack of udelay()'s reliability, suggested by Russell King.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define ST_RNG_FILL_FIFO_TIMEOUT	(12 * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) struct st_rng_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	void __iomem	*base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	struct clk	*clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct hwrng	ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static int st_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct st_rng_data *ddata = (struct st_rng_data *)rng->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	u32 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	/* Wait until FIFO is full - max 4uS*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	for (i = 0; i < ST_RNG_FILL_FIFO_TIMEOUT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		status = readl_relaxed(ddata->base + ST_RNG_STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		if (status & ST_RNG_STATUS_FIFO_FULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	if (i == ST_RNG_FILL_FIFO_TIMEOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	for (i = 0; i < ST_RNG_FIFO_SIZE && i < max; i += 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		*(u16 *)(data + i) =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 			readl_relaxed(ddata->base + ST_RNG_DATA_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	return i;	/* No of bytes read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static int st_rng_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct st_rng_data *ddata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	if (!ddata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	if (IS_ERR(base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		return PTR_ERR(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	clk = devm_clk_get(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	if (IS_ERR(clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	ret = clk_prepare_enable(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	ddata->ops.priv	= (unsigned long)ddata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	ddata->ops.read	= st_rng_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	ddata->ops.name	= pdev->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	ddata->base	= base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	ddata->clk	= clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	dev_set_drvdata(&pdev->dev, ddata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	ret = devm_hwrng_register(&pdev->dev, &ddata->ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		dev_err(&pdev->dev, "Failed to register HW RNG\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		clk_disable_unprepare(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	dev_info(&pdev->dev, "Successfully registered HW RNG\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static int st_rng_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	struct st_rng_data *ddata = dev_get_drvdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	clk_disable_unprepare(ddata->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static const struct of_device_id st_rng_match[] __maybe_unused = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	{ .compatible = "st,rng" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) MODULE_DEVICE_TABLE(of, st_rng_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static struct platform_driver st_rng_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		.name = "st-hwrandom",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		.of_match_table = of_match_ptr(st_rng_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	.probe = st_rng_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	.remove = st_rng_remove
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) module_platform_driver(st_rng_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) MODULE_AUTHOR("Pankaj Dev <pankaj.dev@st.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) MODULE_LICENSE("GPL v2");