^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * PIC32 RNG driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Joshua Henderson <joshua.henderson@microchip.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2016 Microchip Technology Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/clkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/hw_random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define RNGCON 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define TRNGEN BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PRNGEN BIT(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PRNGCONT BIT(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define TRNGMOD BIT(11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SEEDLOAD BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RNGPOLY1 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define RNGPOLY2 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define RNGNUMGEN1 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define RNGNUMGEN2 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define RNGSEED1 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RNGSEED2 0x1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RNGRCNT 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RCNT_MASK 0x7F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct pic32_rng {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct hwrng rng;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * The TRNG can generate up to 24Mbps. This is a timeout that should be safe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * enough given the instructions in the loop and that the TRNG may not always
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * be at maximum rate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define RNG_TIMEOUT 500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static int pic32_rng_read(struct hwrng *rng, void *buf, size_t max,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) bool wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct pic32_rng *priv = container_of(rng, struct pic32_rng, rng);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u64 *data = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u32 t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) unsigned int timeout = RNG_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) t = readl(priv->base + RNGRCNT) & RCNT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (t == 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* TRNG value comes through the seed registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) *data = ((u64)readl(priv->base + RNGSEED2) << 32) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) readl(priv->base + RNGSEED1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) } while (wait && --timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static int pic32_rng_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct pic32_rng *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) u32 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) priv->base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (IS_ERR(priv->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return PTR_ERR(priv->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) priv->clk = devm_clk_get(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (IS_ERR(priv->clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return PTR_ERR(priv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ret = clk_prepare_enable(priv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* enable TRNG in enhanced mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) v = TRNGEN | TRNGMOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) writel(v, priv->base + RNGCON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) priv->rng.name = pdev->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) priv->rng.read = pic32_rng_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ret = hwrng_register(&priv->rng);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) goto err_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) platform_set_drvdata(pdev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) err_register:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) clk_disable_unprepare(priv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static int pic32_rng_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct pic32_rng *rng = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) hwrng_unregister(&rng->rng);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) writel(0, rng->base + RNGCON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) clk_disable_unprepare(rng->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static const struct of_device_id pic32_rng_of_match[] __maybe_unused = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) { .compatible = "microchip,pic32mzda-rng", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) MODULE_DEVICE_TABLE(of, pic32_rng_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static struct platform_driver pic32_rng_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .probe = pic32_rng_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .remove = pic32_rng_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .name = "pic32-rng",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .of_match_table = of_match_ptr(pic32_rng_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) module_platform_driver(pic32_rng_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MODULE_AUTHOR("Joshua Henderson <joshua.henderson@microchip.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) MODULE_DESCRIPTION("Microchip PIC32 RNG Driver");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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