^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * omap3-rom-rng.c - RNG driver for TI OMAP3 CPU family
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2009 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Juha Yrjola <juha.yrjola@solidboot.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2013 Pali Rohár <pali@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/hw_random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define RNG_RESET 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define RNG_GEN_PRNG_HW_INIT 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define RNG_GEN_HW 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct omap_rom_rng {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct hwrng ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u32 (*rom_rng_call)(u32 ptr, u32 count, u32 flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static int omap3_rom_rng_read(struct hwrng *rng, void *data, size_t max, bool w)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct omap_rom_rng *ddata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u32 ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) ddata = (struct omap_rom_rng *)rng->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) r = pm_runtime_get_sync(ddata->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) if (r < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) pm_runtime_put_noidle(ddata->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ptr = virt_to_phys(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) r = ddata->rom_rng_call(ptr, 4, RNG_GEN_HW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) if (r != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) r = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) r = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) pm_runtime_mark_last_busy(ddata->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) pm_runtime_put_autosuspend(ddata->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static int __maybe_unused omap_rom_rng_runtime_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct omap_rom_rng *ddata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ddata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) r = ddata->rom_rng_call(0, 0, RNG_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (r != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) dev_err(dev, "reset failed: %d\n", r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) clk_disable_unprepare(ddata->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static int __maybe_unused omap_rom_rng_runtime_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct omap_rom_rng *ddata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ddata = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) r = clk_prepare_enable(ddata->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (r < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) r = ddata->rom_rng_call(0, 0, RNG_GEN_PRNG_HW_INIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (r != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) clk_disable(ddata->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) dev_err(dev, "HW init failed: %d\n", r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static void omap_rom_rng_finish(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct omap_rom_rng *ddata = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) pm_runtime_dont_use_autosuspend(ddata->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) pm_runtime_disable(ddata->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static int omap3_rom_rng_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct omap_rom_rng *ddata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (!ddata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ddata->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) ddata->ops.priv = (unsigned long)ddata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ddata->ops.name = "omap3-rom";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ddata->ops.read = of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ddata->ops.quality = 900;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (!ddata->ops.read) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) dev_err(&pdev->dev, "missing rom code handler\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) dev_set_drvdata(ddata->dev, ddata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) ddata->rom_rng_call = pdev->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (!ddata->rom_rng_call) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) dev_err(ddata->dev, "rom_rng_call is NULL\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ddata->clk = devm_clk_get(ddata->dev, "ick");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (IS_ERR(ddata->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) dev_err(ddata->dev, "unable to get RNG clock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return PTR_ERR(ddata->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) pm_runtime_enable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) pm_runtime_set_autosuspend_delay(&pdev->dev, 500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) pm_runtime_use_autosuspend(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) ret = devm_add_action_or_reset(ddata->dev, omap_rom_rng_finish,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) ddata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return devm_hwrng_register(ddata->dev, &ddata->ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static const struct of_device_id omap_rom_rng_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) { .compatible = "nokia,n900-rom-rng", .data = omap3_rom_rng_read, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) { /* sentinel */ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) MODULE_DEVICE_TABLE(of, omap_rom_rng_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const struct dev_pm_ops omap_rom_rng_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) SET_SYSTEM_SLEEP_PM_OPS(omap_rom_rng_runtime_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) omap_rom_rng_runtime_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static struct platform_driver omap3_rom_rng_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .name = "omap3-rom-rng",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .of_match_table = omap_rom_rng_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .pm = &omap_rom_rng_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .probe = omap3_rom_rng_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) module_platform_driver(omap3_rom_rng_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) MODULE_ALIAS("platform:omap3-rom-rng");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) MODULE_AUTHOR("Juha Yrjola");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) MODULE_AUTHOR("Pali Rohár <pali@kernel.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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