^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * RNG driver for Intel RNGs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2005 (c) MontaVista Software, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * with the majority of the code coming from:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * derived from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Hardware driver for the AMD 768 Random Number Generator (RNG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * (c) Copyright 2001 Red Hat Inc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * derived from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Hardware driver for Intel i810 Random Number Generator (RNG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/hw_random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/stop_machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define PFX KBUILD_MODNAME ": "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * RNG registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define INTEL_RNG_HW_STATUS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define INTEL_RNG_PRESENT 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define INTEL_RNG_ENABLED 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define INTEL_RNG_STATUS 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define INTEL_RNG_DATA_PRESENT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define INTEL_RNG_DATA 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * Magic address at which Intel PCI bridges locate the RNG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define INTEL_RNG_ADDR 0xFFBC015F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define INTEL_RNG_ADDR_LEN 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * LPC bridge PCI config space registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define FWH_DEC_EN1_REG_OLD 0xe3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define FWH_DEC_EN1_REG_NEW 0xd9 /* high byte of 16-bit register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define FWH_F8_EN_MASK 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define BIOS_CNTL_REG_OLD 0x4e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define BIOS_CNTL_REG_NEW 0xdc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define BIOS_CNTL_WRITE_ENABLE_MASK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define BIOS_CNTL_LOCK_ENABLE_MASK 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * Magic address at which Intel Firmware Hubs get accessed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define INTEL_FWH_ADDR 0xffff0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define INTEL_FWH_ADDR_LEN 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * Intel Firmware Hub command codes (write to any address inside the device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define INTEL_FWH_RESET_CMD 0xff /* aka READ_ARRAY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define INTEL_FWH_READ_ID_CMD 0x90
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * Intel Firmware Hub Read ID command result addresses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define INTEL_FWH_MANUFACTURER_CODE_ADDRESS 0x000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define INTEL_FWH_DEVICE_CODE_ADDRESS 0x000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * Intel Firmware Hub Read ID command result values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define INTEL_FWH_MANUFACTURER_CODE 0x89
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define INTEL_FWH_DEVICE_CODE_8M 0xac
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define INTEL_FWH_DEVICE_CODE_4M 0xad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * Data for PCI driver interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * This data only exists for exporting the supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * PCI ids via MODULE_DEVICE_TABLE. We do not actually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * register a pci_driver, because someone else might one day
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * want to register another driver on the same PCI id.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static const struct pci_device_id pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* AA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) { PCI_DEVICE(0x8086, 0x2418) }, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) { PCI_DEVICE(0x8086, 0x2410) }, /* AA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* AB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) { PCI_DEVICE(0x8086, 0x2428) }, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) { PCI_DEVICE(0x8086, 0x2420) }, /* AB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* ??
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) { PCI_DEVICE(0x8086, 0x2430) }, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* BAM, CAM, DBM, FBM, GxM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) { PCI_DEVICE(0x8086, 0x2448) }, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) { PCI_DEVICE(0x8086, 0x244c) }, /* BAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) { PCI_DEVICE(0x8086, 0x248c) }, /* CAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) { PCI_DEVICE(0x8086, 0x24cc) }, /* DBM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) { PCI_DEVICE(0x8086, 0x2641) }, /* FBM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) { PCI_DEVICE(0x8086, 0x27b9) }, /* GxM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) { PCI_DEVICE(0x8086, 0x27bd) }, /* GxM DH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* BA, CA, DB, Ex, 6300, Fx, 631x/632x, Gx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) { PCI_DEVICE(0x8086, 0x244e) }, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) { PCI_DEVICE(0x8086, 0x2440) }, /* BA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) { PCI_DEVICE(0x8086, 0x2480) }, /* CA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) { PCI_DEVICE(0x8086, 0x24c0) }, /* DB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) { PCI_DEVICE(0x8086, 0x24d0) }, /* Ex */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) { PCI_DEVICE(0x8086, 0x25a1) }, /* 6300 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) { PCI_DEVICE(0x8086, 0x2640) }, /* Fx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) { PCI_DEVICE(0x8086, 0x2670) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) { PCI_DEVICE(0x8086, 0x2671) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) { PCI_DEVICE(0x8086, 0x2672) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) { PCI_DEVICE(0x8086, 0x2673) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) { PCI_DEVICE(0x8086, 0x2674) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) { PCI_DEVICE(0x8086, 0x2675) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) { PCI_DEVICE(0x8086, 0x2676) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) { PCI_DEVICE(0x8086, 0x2677) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) { PCI_DEVICE(0x8086, 0x2678) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) { PCI_DEVICE(0x8086, 0x2679) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) { PCI_DEVICE(0x8086, 0x267a) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) { PCI_DEVICE(0x8086, 0x267b) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) { PCI_DEVICE(0x8086, 0x267c) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) { PCI_DEVICE(0x8086, 0x267d) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) { PCI_DEVICE(0x8086, 0x267e) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) { PCI_DEVICE(0x8086, 0x267f) }, /* 631x/632x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { PCI_DEVICE(0x8086, 0x27b8) }, /* Gx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) { PCI_DEVICE(0x8086, 0x245e) }, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) { PCI_DEVICE(0x8086, 0x2450) }, /* E */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) { 0, }, /* terminate list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) MODULE_DEVICE_TABLE(pci, pci_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static __initdata int no_fwh_detect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) module_param(no_fwh_detect, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) MODULE_PARM_DESC(no_fwh_detect, "Skip FWH detection:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) " positive value - skip if FWH space locked read-only\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) " negative value - skip always");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static inline u8 hwstatus_get(void __iomem *mem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return readb(mem + INTEL_RNG_HW_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static inline u8 hwstatus_set(void __iomem *mem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) u8 hw_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) writeb(hw_status, mem + INTEL_RNG_HW_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return hwstatus_get(mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static int intel_rng_data_present(struct hwrng *rng, int wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) void __iomem *mem = (void __iomem *)rng->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int data, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) for (i = 0; i < 20; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) data = !!(readb(mem + INTEL_RNG_STATUS) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) INTEL_RNG_DATA_PRESENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (data || !wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static int intel_rng_data_read(struct hwrng *rng, u32 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) void __iomem *mem = (void __iomem *)rng->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) *data = readb(mem + INTEL_RNG_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static int intel_rng_init(struct hwrng *rng)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) void __iomem *mem = (void __iomem *)rng->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) u8 hw_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) int err = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) hw_status = hwstatus_get(mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* turn RNG h/w on, if it's off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if ((hw_status & INTEL_RNG_ENABLED) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) hw_status = hwstatus_set(mem, hw_status | INTEL_RNG_ENABLED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if ((hw_status & INTEL_RNG_ENABLED) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) pr_err(PFX "cannot enable RNG, aborting\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static void intel_rng_cleanup(struct hwrng *rng)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) void __iomem *mem = (void __iomem *)rng->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) u8 hw_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) hw_status = hwstatus_get(mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (hw_status & INTEL_RNG_ENABLED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) hwstatus_set(mem, hw_status & ~INTEL_RNG_ENABLED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) pr_warn(PFX "unusual: RNG already disabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static struct hwrng intel_rng = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .name = "intel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .init = intel_rng_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .cleanup = intel_rng_cleanup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .data_present = intel_rng_data_present,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .data_read = intel_rng_data_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) struct intel_rng_hw {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct pci_dev *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) void __iomem *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) u8 bios_cntl_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) u8 bios_cntl_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) u8 fwh_dec_en1_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) u8 fwh_dec_en1_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static int __init intel_rng_hw_init(void *_intel_rng_hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) struct intel_rng_hw *intel_rng_hw = _intel_rng_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) u8 mfc, dvc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /* interrupts disabled in stop_machine call */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (!(intel_rng_hw->fwh_dec_en1_val & FWH_F8_EN_MASK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) pci_write_config_byte(intel_rng_hw->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) intel_rng_hw->fwh_dec_en1_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) intel_rng_hw->fwh_dec_en1_val |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) FWH_F8_EN_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (!(intel_rng_hw->bios_cntl_val & BIOS_CNTL_WRITE_ENABLE_MASK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) pci_write_config_byte(intel_rng_hw->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) intel_rng_hw->bios_cntl_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) intel_rng_hw->bios_cntl_val |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) BIOS_CNTL_WRITE_ENABLE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) writeb(INTEL_FWH_RESET_CMD, intel_rng_hw->mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) writeb(INTEL_FWH_READ_ID_CMD, intel_rng_hw->mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) mfc = readb(intel_rng_hw->mem + INTEL_FWH_MANUFACTURER_CODE_ADDRESS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) dvc = readb(intel_rng_hw->mem + INTEL_FWH_DEVICE_CODE_ADDRESS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) writeb(INTEL_FWH_RESET_CMD, intel_rng_hw->mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) if (!(intel_rng_hw->bios_cntl_val &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) (BIOS_CNTL_LOCK_ENABLE_MASK|BIOS_CNTL_WRITE_ENABLE_MASK)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) pci_write_config_byte(intel_rng_hw->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) intel_rng_hw->bios_cntl_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) intel_rng_hw->bios_cntl_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (!(intel_rng_hw->fwh_dec_en1_val & FWH_F8_EN_MASK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) pci_write_config_byte(intel_rng_hw->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) intel_rng_hw->fwh_dec_en1_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) intel_rng_hw->fwh_dec_en1_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (mfc != INTEL_FWH_MANUFACTURER_CODE ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) (dvc != INTEL_FWH_DEVICE_CODE_8M &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) dvc != INTEL_FWH_DEVICE_CODE_4M)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) pr_notice(PFX "FWH not detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static int __init intel_init_hw_struct(struct intel_rng_hw *intel_rng_hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) intel_rng_hw->bios_cntl_val = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) intel_rng_hw->fwh_dec_en1_val = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) intel_rng_hw->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* Check for Intel 82802 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (dev->device < 0x2640) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) intel_rng_hw->fwh_dec_en1_off = FWH_DEC_EN1_REG_OLD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) intel_rng_hw->bios_cntl_off = BIOS_CNTL_REG_OLD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) intel_rng_hw->fwh_dec_en1_off = FWH_DEC_EN1_REG_NEW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) intel_rng_hw->bios_cntl_off = BIOS_CNTL_REG_NEW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) pci_read_config_byte(dev, intel_rng_hw->fwh_dec_en1_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) &intel_rng_hw->fwh_dec_en1_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) pci_read_config_byte(dev, intel_rng_hw->bios_cntl_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) &intel_rng_hw->bios_cntl_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if ((intel_rng_hw->bios_cntl_val &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) (BIOS_CNTL_LOCK_ENABLE_MASK|BIOS_CNTL_WRITE_ENABLE_MASK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) == BIOS_CNTL_LOCK_ENABLE_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static __initdata /*const*/ char warning[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) PFX "Firmware space is locked read-only. If you can't or\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) PFX "don't want to disable this in firmware setup, and if\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) PFX "you are certain that your system has a functional\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) PFX "RNG, try using the 'no_fwh_detect' option.\n";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (no_fwh_detect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) pr_warn("%s", warning);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) intel_rng_hw->mem = ioremap(INTEL_FWH_ADDR, INTEL_FWH_ADDR_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (intel_rng_hw->mem == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static int __init mod_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) int err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) struct pci_dev *dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) void __iomem *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) u8 hw_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) struct intel_rng_hw *intel_rng_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) for (i = 0; !dev && pci_tbl[i].vendor; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) dev = pci_get_device(pci_tbl[i].vendor, pci_tbl[i].device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) goto out; /* Device not found. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (no_fwh_detect < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) pci_dev_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) goto fwh_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) intel_rng_hw = kmalloc(sizeof(*intel_rng_hw), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (!intel_rng_hw) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) pci_dev_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) err = intel_init_hw_struct(intel_rng_hw, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) pci_dev_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) kfree(intel_rng_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (err == -ENODEV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) goto fwh_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) * Since the BIOS code/data is going to disappear from its normal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) * location with the Read ID command, all activity on the system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * must be stopped until the state is back to normal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) * Use stop_machine because IPIs can be blocked by disabling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * interrupts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) err = stop_machine(intel_rng_hw_init, intel_rng_hw, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) pci_dev_put(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) iounmap(intel_rng_hw->mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) kfree(intel_rng_hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) fwh_done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) mem = ioremap(INTEL_RNG_ADDR, INTEL_RNG_ADDR_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (!mem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) intel_rng.priv = (unsigned long)mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /* Check for Random Number Generator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) hw_status = hwstatus_get(mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if ((hw_status & INTEL_RNG_PRESENT) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) iounmap(mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) pr_info("Intel 82802 RNG detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) err = hwrng_register(&intel_rng);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) pr_err(PFX "RNG registering failed (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) iounmap(mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static void __exit mod_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) void __iomem *mem = (void __iomem *)intel_rng.priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) hwrng_unregister(&intel_rng);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) iounmap(mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) module_init(mod_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) module_exit(mod_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) MODULE_DESCRIPTION("H/W RNG driver for Intel chipsets");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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