Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2010-2012 Broadcom. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (c) 2013 Lubomir Rintel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/hw_random.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/printk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define RNG_CTRL	0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define RNG_STATUS	0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define RNG_DATA	0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define RNG_INT_MASK	0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) /* enable rng */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define RNG_RBGEN	0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /* the initial numbers generated are "less random" so will be discarded */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define RNG_WARMUP_COUNT 0x40000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define RNG_INT_OFF	0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) struct bcm2835_rng_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct hwrng rng;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	bool mask_interrupts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	return container_of(rng, struct bcm2835_rng_priv, rng);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static inline u32 rng_readl(struct bcm2835_rng_priv *priv, u32 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	/* MIPS chips strapped for BE will automagically configure the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	 * peripheral registers for CPU-native byte order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		return __raw_readl(priv->base + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		return readl(priv->base + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static inline void rng_writel(struct bcm2835_rng_priv *priv, u32 val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 			      u32 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		__raw_writel(val, priv->base + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		writel(val, priv->base + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static int bcm2835_rng_read(struct hwrng *rng, void *buf, size_t max,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 			       bool wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	struct bcm2835_rng_priv *priv = to_rng_priv(rng);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	u32 max_words = max / sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	u32 num_words, count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	while ((rng_readl(priv, RNG_STATUS) >> 24) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		if (!wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	num_words = rng_readl(priv, RNG_STATUS) >> 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	if (num_words > max_words)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		num_words = max_words;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	for (count = 0; count < num_words; count++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		((u32 *)buf)[count] = rng_readl(priv, RNG_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	return num_words * sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) static int bcm2835_rng_init(struct hwrng *rng)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	struct bcm2835_rng_priv *priv = to_rng_priv(rng);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	if (!IS_ERR(priv->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		ret = clk_prepare_enable(priv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (priv->mask_interrupts) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		/* mask the interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		val = rng_readl(priv, RNG_INT_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		val |= RNG_INT_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		rng_writel(priv, val, RNG_INT_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	/* set warm-up count & enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	rng_writel(priv, RNG_WARMUP_COUNT, RNG_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	rng_writel(priv, RNG_RBGEN, RNG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static void bcm2835_rng_cleanup(struct hwrng *rng)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	struct bcm2835_rng_priv *priv = to_rng_priv(rng);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	/* disable rng hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	rng_writel(priv, 0, RNG_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	if (!IS_ERR(priv->clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		clk_disable_unprepare(priv->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct bcm2835_rng_of_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	bool mask_interrupts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static const struct bcm2835_rng_of_data nsp_rng_of_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	.mask_interrupts = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static const struct of_device_id bcm2835_rng_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	{ .compatible = "brcm,bcm2835-rng"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	{ .compatible = "brcm,bcm-nsp-rng", .data = &nsp_rng_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	{ .compatible = "brcm,bcm5301x-rng", .data = &nsp_rng_of_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	{ .compatible = "brcm,bcm6368-rng"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int bcm2835_rng_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	const struct bcm2835_rng_of_data *of_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	const struct of_device_id *rng_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	struct bcm2835_rng_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	platform_set_drvdata(pdev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	/* map peripheral */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	priv->base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	if (IS_ERR(priv->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		return PTR_ERR(priv->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	/* Clock is optional on most platforms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	priv->clk = devm_clk_get(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	if (PTR_ERR(priv->clk) == -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		return -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	priv->rng.name = pdev->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	priv->rng.init = bcm2835_rng_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	priv->rng.read = bcm2835_rng_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	priv->rng.cleanup = bcm2835_rng_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (dev_of_node(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		rng_id = of_match_node(bcm2835_rng_of_match, dev->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		if (!rng_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		/* Check for rng init function, execute it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		of_data = rng_id->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		if (of_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 			priv->mask_interrupts = of_data->mask_interrupts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	/* register driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	err = devm_hwrng_register(dev, &priv->rng);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		dev_err(dev, "hwrng registration failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		dev_info(dev, "hwrng registered\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) MODULE_DEVICE_TABLE(of, bcm2835_rng_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static const struct platform_device_id bcm2835_rng_devtype[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	{ .name = "bcm2835-rng" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	{ .name = "bcm63xx-rng" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	{ /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) MODULE_DEVICE_TABLE(platform, bcm2835_rng_devtype);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static struct platform_driver bcm2835_rng_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		.name = "bcm2835-rng",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		.of_match_table = bcm2835_rng_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	.probe		= bcm2835_rng_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	.id_table	= bcm2835_rng_devtype,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) module_platform_driver(bcm2835_rng_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) MODULE_DESCRIPTION("BCM2835 Random Number Generator (RNG) driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) MODULE_LICENSE("GPL v2");