^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Bluetooth HCI UART driver for marvell devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2016 Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2016 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/skbuff.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/tty.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/serdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <net/bluetooth/bluetooth.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <net/bluetooth/hci_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "hci_uart.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define HCI_FW_REQ_PKT 0xA5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define HCI_CHIP_VER_PKT 0xAA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define MRVL_ACK 0x5A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define MRVL_NAK 0xBF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define MRVL_RAW_DATA 0x1F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) STATE_CHIP_VER_PENDING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) STATE_FW_REQ_PENDING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct mrvl_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct sk_buff *rx_skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct sk_buff_head txq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct sk_buff_head rawq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) unsigned int tx_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u8 id, rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct mrvl_serdev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct hci_uart hu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct hci_mrvl_pkt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) __le16 lhs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) __le16 rhs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define HCI_MRVL_PKT_SIZE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int mrvl_open(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct mrvl_data *mrvl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) BT_DBG("hu %p", hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (!hci_uart_has_flow_control(hu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) mrvl = kzalloc(sizeof(*mrvl), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (!mrvl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) skb_queue_head_init(&mrvl->txq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) skb_queue_head_init(&mrvl->rawq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) set_bit(STATE_CHIP_VER_PENDING, &mrvl->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) hu->priv = mrvl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (hu->serdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ret = serdev_device_open(hu->serdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) kfree(mrvl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int mrvl_close(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct mrvl_data *mrvl = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) BT_DBG("hu %p", hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (hu->serdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) serdev_device_close(hu->serdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) skb_queue_purge(&mrvl->txq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) skb_queue_purge(&mrvl->rawq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) kfree_skb(mrvl->rx_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) kfree(mrvl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) hu->priv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int mrvl_flush(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct mrvl_data *mrvl = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) BT_DBG("hu %p", hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) skb_queue_purge(&mrvl->txq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) skb_queue_purge(&mrvl->rawq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static struct sk_buff *mrvl_dequeue(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct mrvl_data *mrvl = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) skb = skb_dequeue(&mrvl->txq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (!skb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* Any raw data ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) skb = skb_dequeue(&mrvl->rawq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* Prepend skb with frame type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static int mrvl_enqueue(struct hci_uart *hu, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct mrvl_data *mrvl = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) skb_queue_tail(&mrvl->txq, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static void mrvl_send_ack(struct hci_uart *hu, unsigned char type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct mrvl_data *mrvl = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* No H4 payload, only 1 byte header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) skb = bt_skb_alloc(0, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (!skb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) bt_dev_err(hu->hdev, "Unable to alloc ack/nak packet");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) hci_skb_pkt_type(skb) = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) skb_queue_tail(&mrvl->txq, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) hci_uart_tx_wakeup(hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static int mrvl_recv_fw_req(struct hci_dev *hdev, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct hci_mrvl_pkt *pkt = (void *)skb->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct hci_uart *hu = hci_get_drvdata(hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct mrvl_data *mrvl = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if ((pkt->lhs ^ pkt->rhs) != 0xffff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) bt_dev_err(hdev, "Corrupted mrvl header");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) mrvl_send_ack(hu, MRVL_NAK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) mrvl_send_ack(hu, MRVL_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (!test_bit(STATE_FW_REQ_PENDING, &mrvl->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) bt_dev_err(hdev, "Received unexpected firmware request");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) mrvl->tx_len = le16_to_cpu(pkt->lhs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) clear_bit(STATE_FW_REQ_PENDING, &mrvl->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) smp_mb__after_atomic();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) wake_up_bit(&mrvl->flags, STATE_FW_REQ_PENDING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int mrvl_recv_chip_ver(struct hci_dev *hdev, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) struct hci_mrvl_pkt *pkt = (void *)skb->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct hci_uart *hu = hci_get_drvdata(hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) struct mrvl_data *mrvl = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u16 version = le16_to_cpu(pkt->lhs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if ((pkt->lhs ^ pkt->rhs) != 0xffff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) bt_dev_err(hdev, "Corrupted mrvl header");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) mrvl_send_ack(hu, MRVL_NAK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) mrvl_send_ack(hu, MRVL_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (!test_bit(STATE_CHIP_VER_PENDING, &mrvl->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) bt_dev_err(hdev, "Received unexpected chip version");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) mrvl->id = version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) mrvl->rev = version >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) bt_dev_info(hdev, "Controller id = %x, rev = %x", mrvl->id, mrvl->rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) clear_bit(STATE_CHIP_VER_PENDING, &mrvl->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) smp_mb__after_atomic();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) wake_up_bit(&mrvl->flags, STATE_CHIP_VER_PENDING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define HCI_RECV_CHIP_VER \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .type = HCI_CHIP_VER_PKT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .hlen = HCI_MRVL_PKT_SIZE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .loff = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .lsize = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .maxlen = HCI_MRVL_PKT_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define HCI_RECV_FW_REQ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .type = HCI_FW_REQ_PKT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .hlen = HCI_MRVL_PKT_SIZE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .loff = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .lsize = 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .maxlen = HCI_MRVL_PKT_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static const struct h4_recv_pkt mrvl_recv_pkts[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) { H4_RECV_ACL, .recv = hci_recv_frame },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) { H4_RECV_SCO, .recv = hci_recv_frame },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) { H4_RECV_EVENT, .recv = hci_recv_frame },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) { HCI_RECV_FW_REQ, .recv = mrvl_recv_fw_req },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) { HCI_RECV_CHIP_VER, .recv = mrvl_recv_chip_ver },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static int mrvl_recv(struct hci_uart *hu, const void *data, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct mrvl_data *mrvl = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return -EUNATCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) mrvl->rx_skb = h4_recv_buf(hu->hdev, mrvl->rx_skb, data, count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) mrvl_recv_pkts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) ARRAY_SIZE(mrvl_recv_pkts));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (IS_ERR(mrvl->rx_skb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) int err = PTR_ERR(mrvl->rx_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) mrvl->rx_skb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static int mrvl_load_firmware(struct hci_dev *hdev, const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct hci_uart *hu = hci_get_drvdata(hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct mrvl_data *mrvl = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) const struct firmware *fw = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) const u8 *fw_ptr, *fw_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) err = request_firmware(&fw, name, &hdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) bt_dev_err(hdev, "Failed to load firmware file %s", name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) fw_ptr = fw->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) fw_max = fw->data + fw->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) bt_dev_info(hdev, "Loading %s", name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) set_bit(STATE_FW_REQ_PENDING, &mrvl->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) while (fw_ptr <= fw_max) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* Controller drives the firmware load by sending firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * request packets containing the expected fragment size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) err = wait_on_bit_timeout(&mrvl->flags, STATE_FW_REQ_PENDING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) TASK_INTERRUPTIBLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) msecs_to_jiffies(2000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (err == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) bt_dev_err(hdev, "Firmware load interrupted");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) err = -EINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) } else if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) bt_dev_err(hdev, "Firmware request timeout");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) err = -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) bt_dev_dbg(hdev, "Firmware request, expecting %d bytes",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) mrvl->tx_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (fw_ptr == fw_max) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /* Controller requests a null size once firmware is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * fully loaded. If controller expects more data, there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * is an issue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) if (!mrvl->tx_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) bt_dev_info(hdev, "Firmware loading complete");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) bt_dev_err(hdev, "Firmware loading failure");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (fw_ptr + mrvl->tx_len > fw_max) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) mrvl->tx_len = fw_max - fw_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) bt_dev_dbg(hdev, "Adjusting tx_len to %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) mrvl->tx_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) skb = bt_skb_alloc(mrvl->tx_len, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (!skb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) bt_dev_err(hdev, "Failed to alloc mem for FW packet");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) bt_cb(skb)->pkt_type = MRVL_RAW_DATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) skb_put_data(skb, fw_ptr, mrvl->tx_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) fw_ptr += mrvl->tx_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) set_bit(STATE_FW_REQ_PENDING, &mrvl->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) skb_queue_tail(&mrvl->rawq, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) hci_uart_tx_wakeup(hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) release_firmware(fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static int mrvl_setup(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) hci_uart_set_flow_control(hu, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) err = mrvl_load_firmware(hu->hdev, "mrvl/helper_uart_3000000.bin");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) bt_dev_err(hu->hdev, "Unable to download firmware helper");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /* Let the final ack go out before switching the baudrate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) hci_uart_wait_until_sent(hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) if (hu->serdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) serdev_device_set_baudrate(hu->serdev, 3000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) hci_uart_set_baudrate(hu, 3000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) hci_uart_set_flow_control(hu, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) err = mrvl_load_firmware(hu->hdev, "mrvl/uart8897_bt.bin");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static const struct hci_uart_proto mrvl_proto = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) .id = HCI_UART_MRVL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .name = "Marvell",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .init_speed = 115200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .open = mrvl_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .close = mrvl_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .flush = mrvl_flush,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .setup = mrvl_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .recv = mrvl_recv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .enqueue = mrvl_enqueue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .dequeue = mrvl_dequeue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static int mrvl_serdev_probe(struct serdev_device *serdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct mrvl_serdev *mrvldev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) mrvldev = devm_kzalloc(&serdev->dev, sizeof(*mrvldev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (!mrvldev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) mrvldev->hu.serdev = serdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) serdev_device_set_drvdata(serdev, mrvldev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return hci_uart_register_device(&mrvldev->hu, &mrvl_proto);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static void mrvl_serdev_remove(struct serdev_device *serdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) struct mrvl_serdev *mrvldev = serdev_device_get_drvdata(serdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) hci_uart_unregister_device(&mrvldev->hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static const struct of_device_id mrvl_bluetooth_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) { .compatible = "mrvl,88w8897" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) MODULE_DEVICE_TABLE(of, mrvl_bluetooth_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static struct serdev_device_driver mrvl_serdev_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .probe = mrvl_serdev_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .remove = mrvl_serdev_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .name = "hci_uart_mrvl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .of_match_table = of_match_ptr(mrvl_bluetooth_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) int __init mrvl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) serdev_device_driver_register(&mrvl_serdev_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return hci_uart_register_proto(&mrvl_proto);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) int __exit mrvl_deinit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) serdev_device_driver_unregister(&mrvl_serdev_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return hci_uart_unregister_proto(&mrvl_proto);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags