^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Bluetooth HCI UART driver for Intel devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2015 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/skbuff.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/tty.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <net/bluetooth/bluetooth.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <net/bluetooth/hci_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "hci_uart.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "btintel.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define STATE_BOOTLOADER 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define STATE_DOWNLOADING 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define STATE_FIRMWARE_LOADED 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define STATE_FIRMWARE_FAILED 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define STATE_BOOTING 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define STATE_LPM_ENABLED 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define STATE_TX_ACTIVE 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define STATE_SUSPENDED 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define STATE_LPM_TRANSACTION 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define HCI_LPM_WAKE_PKT 0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define HCI_LPM_PKT 0xf1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define HCI_LPM_MAX_SIZE 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define HCI_LPM_HDR_SIZE HCI_EVENT_HDR_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define LPM_OP_TX_NOTIFY 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define LPM_OP_SUSPEND_ACK 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define LPM_OP_RESUME_ACK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define LPM_SUSPEND_DELAY_MS 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct hci_lpm_pkt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) __u8 opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) __u8 dlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) __u8 data[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct intel_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct gpio_desc *reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct hci_uart *hu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct mutex hu_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static LIST_HEAD(intel_device_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static DEFINE_MUTEX(intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct intel_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct sk_buff *rx_skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct sk_buff_head txq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct work_struct busy_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct hci_uart *hu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static u8 intel_convert_speed(unsigned int speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) switch (speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) case 9600:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) case 19200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) case 38400:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return 0x02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) case 57600:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) case 115200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return 0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) case 230400:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return 0x05;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) case 460800:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return 0x06;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) case 921600:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) case 1843200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) case 3250000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return 0x09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) case 2000000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return 0x0a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) case 3000000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return 0x0b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int intel_wait_booting(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) err = wait_on_bit_timeout(&intel->flags, STATE_BOOTING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) TASK_INTERRUPTIBLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) msecs_to_jiffies(1000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (err == -EINTR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) bt_dev_err(hu->hdev, "Device boot interrupted");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return -EINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) bt_dev_err(hu->hdev, "Device boot timeout");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static int intel_wait_lpm_transaction(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) err = wait_on_bit_timeout(&intel->flags, STATE_LPM_TRANSACTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) TASK_INTERRUPTIBLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) msecs_to_jiffies(1000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (err == -EINTR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) bt_dev_err(hu->hdev, "LPM transaction interrupted");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return -EINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) bt_dev_err(hu->hdev, "LPM transaction timeout");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static int intel_lpm_suspend(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static const u8 suspend[] = { 0x01, 0x01, 0x01 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (!test_bit(STATE_LPM_ENABLED, &intel->flags) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) test_bit(STATE_SUSPENDED, &intel->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (test_bit(STATE_TX_ACTIVE, &intel->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) bt_dev_dbg(hu->hdev, "Suspending");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) skb = bt_skb_alloc(sizeof(suspend), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (!skb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) skb_put_data(skb, suspend, sizeof(suspend));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) hci_skb_pkt_type(skb) = HCI_LPM_PKT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) set_bit(STATE_LPM_TRANSACTION, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /* LPM flow is a priority, enqueue packet at list head */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) skb_queue_head(&intel->txq, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) hci_uart_tx_wakeup(hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) intel_wait_lpm_transaction(hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /* Even in case of failure, continue and test the suspended flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) clear_bit(STATE_LPM_TRANSACTION, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (!test_bit(STATE_SUSPENDED, &intel->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) bt_dev_err(hu->hdev, "Device suspend error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) bt_dev_dbg(hu->hdev, "Suspended");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) hci_uart_set_flow_control(hu, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static int intel_lpm_resume(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (!test_bit(STATE_LPM_ENABLED, &intel->flags) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) !test_bit(STATE_SUSPENDED, &intel->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) bt_dev_dbg(hu->hdev, "Resuming");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) hci_uart_set_flow_control(hu, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) skb = bt_skb_alloc(0, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (!skb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) hci_skb_pkt_type(skb) = HCI_LPM_WAKE_PKT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) set_bit(STATE_LPM_TRANSACTION, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /* LPM flow is a priority, enqueue packet at list head */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) skb_queue_head(&intel->txq, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) hci_uart_tx_wakeup(hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) intel_wait_lpm_transaction(hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /* Even in case of failure, continue and test the suspended flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) clear_bit(STATE_LPM_TRANSACTION, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (test_bit(STATE_SUSPENDED, &intel->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) bt_dev_err(hu->hdev, "Device resume error");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) bt_dev_dbg(hu->hdev, "Resumed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #endif /* CONFIG_PM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int intel_lpm_host_wake(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static const u8 lpm_resume_ack[] = { LPM_OP_RESUME_ACK, 0x00 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) hci_uart_set_flow_control(hu, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) clear_bit(STATE_SUSPENDED, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) skb = bt_skb_alloc(sizeof(lpm_resume_ack), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (!skb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) skb_put_data(skb, lpm_resume_ack, sizeof(lpm_resume_ack));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) hci_skb_pkt_type(skb) = HCI_LPM_PKT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* LPM flow is a priority, enqueue packet at list head */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) skb_queue_head(&intel->txq, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) hci_uart_tx_wakeup(hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) bt_dev_dbg(hu->hdev, "Resumed by controller");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static irqreturn_t intel_irq(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct intel_device *idev = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) dev_info(&idev->pdev->dev, "hci_intel irq\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) mutex_lock(&idev->hu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (idev->hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) intel_lpm_host_wake(idev->hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) mutex_unlock(&idev->hu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /* Host/Controller are now LPM resumed, trigger a new delayed suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) pm_runtime_get(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) pm_runtime_mark_last_busy(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) pm_runtime_put_autosuspend(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static int intel_set_power(struct hci_uart *hu, bool powered)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct intel_device *idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) int err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (!hu->tty->dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) mutex_lock(&intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) list_for_each_entry(idev, &intel_device_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /* tty device and pdev device should share the same parent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * which is the UART port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) if (hu->tty->dev->parent != idev->pdev->dev.parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (!idev->reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) err = -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) BT_INFO("hu %p, Switching compatible pm device (%s) to %u",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) hu, dev_name(&idev->pdev->dev), powered);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) gpiod_set_value(idev->reset, powered);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /* Provide to idev a hu reference which is used to run LPM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * transactions (lpm suspend/resume) from PM callbacks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * hu needs to be protected against concurrent removing during
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * these PM ops.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) mutex_lock(&idev->hu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) idev->hu = powered ? hu : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) mutex_unlock(&idev->hu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) if (idev->irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if (powered && device_can_wakeup(&idev->pdev->dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) err = devm_request_threaded_irq(&idev->pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) idev->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) intel_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) "bt-host-wake", idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) BT_ERR("hu %p, unable to allocate irq-%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) hu, idev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) device_wakeup_enable(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) pm_runtime_set_active(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) pm_runtime_use_autosuspend(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) pm_runtime_set_autosuspend_delay(&idev->pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) LPM_SUSPEND_DELAY_MS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) pm_runtime_enable(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) } else if (!powered && device_may_wakeup(&idev->pdev->dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) devm_free_irq(&idev->pdev->dev, idev->irq, idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) device_wakeup_disable(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) pm_runtime_disable(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) mutex_unlock(&intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) static void intel_busy_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct intel_data *intel = container_of(work, struct intel_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) busy_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) struct intel_device *idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (!intel->hu->tty->dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) /* Link is busy, delay the suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) mutex_lock(&intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) list_for_each_entry(idev, &intel_device_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (intel->hu->tty->dev->parent == idev->pdev->dev.parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) pm_runtime_get(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) pm_runtime_mark_last_busy(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) pm_runtime_put_autosuspend(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) mutex_unlock(&intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static int intel_open(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) struct intel_data *intel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) BT_DBG("hu %p", hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) if (!hci_uart_has_flow_control(hu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) intel = kzalloc(sizeof(*intel), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) if (!intel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) skb_queue_head_init(&intel->txq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) INIT_WORK(&intel->busy_work, intel_busy_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) intel->hu = hu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) hu->priv = intel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (!intel_set_power(hu, true))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) set_bit(STATE_BOOTING, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static int intel_close(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) BT_DBG("hu %p", hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) cancel_work_sync(&intel->busy_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) intel_set_power(hu, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) skb_queue_purge(&intel->txq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) kfree_skb(intel->rx_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) kfree(intel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) hu->priv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) static int intel_flush(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) BT_DBG("hu %p", hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) skb_queue_purge(&intel->txq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) static int inject_cmd_complete(struct hci_dev *hdev, __u16 opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) struct hci_event_hdr *hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) struct hci_ev_cmd_complete *evt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) skb = bt_skb_alloc(sizeof(*hdr) + sizeof(*evt) + 1, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (!skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) hdr = skb_put(skb, sizeof(*hdr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) hdr->evt = HCI_EV_CMD_COMPLETE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) hdr->plen = sizeof(*evt) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) evt = skb_put(skb, sizeof(*evt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) evt->ncmd = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) evt->opcode = cpu_to_le16(opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) skb_put_u8(skb, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) hci_skb_pkt_type(skb) = HCI_EVENT_PKT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) return hci_recv_frame(hdev, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) static int intel_set_baudrate(struct hci_uart *hu, unsigned int speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) struct hci_dev *hdev = hu->hdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) u8 speed_cmd[] = { 0x06, 0xfc, 0x01, 0x00 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) /* This can be the first command sent to the chip, check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) * that the controller is ready.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) err = intel_wait_booting(hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) clear_bit(STATE_BOOTING, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) /* In case of timeout, try to continue anyway */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) if (err && err != -ETIMEDOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) bt_dev_info(hdev, "Change controller speed to %d", speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) speed_cmd[3] = intel_convert_speed(speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) if (speed_cmd[3] == 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) bt_dev_err(hdev, "Unsupported speed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) /* Device will not accept speed change if Intel version has not been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) * previously requested.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) skb = __hci_cmd_sync(hdev, 0xfc05, 0, NULL, HCI_CMD_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (IS_ERR(skb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) bt_dev_err(hdev, "Reading Intel version information failed (%ld)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) PTR_ERR(skb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) return PTR_ERR(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) skb = bt_skb_alloc(sizeof(speed_cmd), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (!skb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) bt_dev_err(hdev, "Failed to alloc memory for baudrate packet");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) skb_put_data(skb, speed_cmd, sizeof(speed_cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) hci_uart_set_flow_control(hu, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) skb_queue_tail(&intel->txq, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) hci_uart_tx_wakeup(hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) /* wait 100ms to change baudrate on controller side */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) hci_uart_set_baudrate(hu, speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) hci_uart_set_flow_control(hu, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) static int intel_setup(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) struct hci_dev *hdev = hu->hdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) struct intel_version ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) struct intel_boot_params params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) struct intel_device *idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) const struct firmware *fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) char fwname[64];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) u32 boot_param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) ktime_t calltime, delta, rettime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) unsigned long long duration;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) unsigned int init_speed, oper_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) int speed_change = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) bt_dev_dbg(hdev, "start intel_setup");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) hu->hdev->set_diag = btintel_set_diag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) hu->hdev->set_bdaddr = btintel_set_bdaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) /* Set the default boot parameter to 0x0 and it is updated to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * SKU specific boot parameter after reading Intel_Write_Boot_Params
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) * command while downloading the firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) boot_param = 0x00000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) calltime = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if (hu->init_speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) init_speed = hu->init_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) init_speed = hu->proto->init_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) if (hu->oper_speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) oper_speed = hu->oper_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) oper_speed = hu->proto->oper_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (oper_speed && init_speed && oper_speed != init_speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) speed_change = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) /* Check that the controller is ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) err = intel_wait_booting(hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) clear_bit(STATE_BOOTING, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) /* In case of timeout, try to continue anyway */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (err && err != -ETIMEDOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) set_bit(STATE_BOOTLOADER, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) /* Read the Intel version information to determine if the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) * is in bootloader mode or if it already has operational firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) * loaded.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) err = btintel_read_version(hdev, &ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) /* The hardware platform number has a fixed value of 0x37 and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) * for now only accept this single value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (ver.hw_platform != 0x37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) bt_dev_err(hdev, "Unsupported Intel hardware platform (%u)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ver.hw_platform);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) /* Check for supported iBT hardware variants of this firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) * loading method.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) * This check has been put in place to ensure correct forward
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) * compatibility options when newer hardware variants come along.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) switch (ver.hw_variant) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) case 0x0b: /* LnP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) case 0x0c: /* WsP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) case 0x12: /* ThP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) ver.hw_variant);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) btintel_version_info(hdev, &ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) /* The firmware variant determines if the device is in bootloader
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) * mode or is running operational firmware. The value 0x06 identifies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) * the bootloader and the value 0x23 identifies the operational
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) * firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) * When the operational firmware is already present, then only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) * the check for valid Bluetooth device address is needed. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) * determines if the device will be added as configured or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) * unconfigured controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) * It is not possible to use the Secure Boot Parameters in this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) * case since that command is only available in bootloader mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) if (ver.fw_variant == 0x23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) clear_bit(STATE_BOOTLOADER, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) btintel_check_bdaddr(hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) /* If the device is not in bootloader mode, then the only possible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) * choice is to return an error and abort the device initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (ver.fw_variant != 0x06) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) bt_dev_err(hdev, "Unsupported Intel firmware variant (%u)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) ver.fw_variant);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) /* Read the secure boot parameters to identify the operating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) * details of the bootloader.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) err = btintel_read_boot_params(hdev, ¶ms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) /* It is required that every single firmware fragment is acknowledged
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) * with a command complete event. If the boot parameters indicate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) * that this bootloader does not send them, then abort the setup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if (params.limited_cce != 0x00) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) bt_dev_err(hdev, "Unsupported Intel firmware loading method (%u)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) params.limited_cce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /* If the OTP has no valid Bluetooth device address, then there will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) * also be no valid address for the operational firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if (!bacmp(¶ms.otp_bdaddr, BDADDR_ANY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) bt_dev_info(hdev, "No device address configured");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) /* With this Intel bootloader only the hardware variant and device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) * revision information are used to select the right firmware for SfP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) * and WsP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) * The firmware filename is ibt-<hw_variant>-<dev_revid>.sfi.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) * Currently the supported hardware variants are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) * 11 (0x0b) for iBT 3.0 (LnP/SfP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) * 12 (0x0c) for iBT 3.5 (WsP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) * For ThP/JfP and for future SKU's, the FW name varies based on HW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) * variant, HW revision and FW revision, as these are dependent on CNVi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) * and RF Combination.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) * 18 (0x12) for iBT3.5 (ThP/JfP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) * The firmware file name for these will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) * ibt-<hw_variant>-<hw_revision>-<fw_revision>.sfi.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) switch (ver.hw_variant) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) case 0x0b: /* SfP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) case 0x0c: /* WsP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.sfi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) ver.hw_variant, le16_to_cpu(params.dev_revid));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) case 0x12: /* ThP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.sfi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) ver.hw_variant, ver.hw_revision, ver.fw_revision);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) ver.hw_variant);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) err = request_firmware(&fw, fwname, &hdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) bt_dev_err(hdev, "Failed to load Intel firmware file (%d)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) bt_dev_info(hdev, "Found device firmware: %s", fwname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) /* Save the DDC file name for later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) switch (ver.hw_variant) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) case 0x0b: /* SfP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) case 0x0c: /* WsP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.ddc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) ver.hw_variant, le16_to_cpu(params.dev_revid));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) case 0x12: /* ThP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.ddc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) ver.hw_variant, ver.hw_revision, ver.fw_revision);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) ver.hw_variant);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) if (fw->size < 644) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) bt_dev_err(hdev, "Invalid size of firmware file (%zu)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) fw->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) err = -EBADF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) set_bit(STATE_DOWNLOADING, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) /* Start firmware downloading and get boot parameter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) err = btintel_download_firmware(hdev, fw, &boot_param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) set_bit(STATE_FIRMWARE_LOADED, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) bt_dev_info(hdev, "Waiting for firmware download to complete");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) /* Before switching the device into operational mode and with that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) * booting the loaded firmware, wait for the bootloader notification
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) * that all fragments have been successfully received.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * When the event processing receives the notification, then the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * STATE_DOWNLOADING flag will be cleared.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) * The firmware loading should not take longer than 5 seconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * and thus just timeout if that happens and fail the setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) * of this device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) err = wait_on_bit_timeout(&intel->flags, STATE_DOWNLOADING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) TASK_INTERRUPTIBLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) msecs_to_jiffies(5000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) if (err == -EINTR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) bt_dev_err(hdev, "Firmware loading interrupted");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) err = -EINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) bt_dev_err(hdev, "Firmware loading timeout");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) err = -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) if (test_bit(STATE_FIRMWARE_FAILED, &intel->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) bt_dev_err(hdev, "Firmware loading failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) err = -ENOEXEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) rettime = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) delta = ktime_sub(rettime, calltime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) duration = (unsigned long long) ktime_to_ns(delta) >> 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) bt_dev_info(hdev, "Firmware loaded in %llu usecs", duration);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) release_firmware(fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) /* We need to restore the default speed before Intel reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) if (speed_change) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) err = intel_set_baudrate(hu, init_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) calltime = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) set_bit(STATE_BOOTING, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) err = btintel_send_intel_reset(hdev, boot_param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) /* The bootloader will not indicate when the device is ready. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) * is done by the operational firmware sending bootup notification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) * Booting into operational firmware should not take longer than
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) * 1 second. However if that happens, then just fail the setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) * since something went wrong.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) bt_dev_info(hdev, "Waiting for device to boot");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) err = intel_wait_booting(hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) clear_bit(STATE_BOOTING, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) rettime = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) delta = ktime_sub(rettime, calltime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) duration = (unsigned long long) ktime_to_ns(delta) >> 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) bt_dev_info(hdev, "Device booted in %llu usecs", duration);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) /* Enable LPM if matching pdev with wakeup enabled, set TX active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) * until further LPM TX notification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) mutex_lock(&intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) list_for_each_entry(idev, &intel_device_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) if (!hu->tty->dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) if (hu->tty->dev->parent == idev->pdev->dev.parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) if (device_may_wakeup(&idev->pdev->dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) set_bit(STATE_LPM_ENABLED, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) set_bit(STATE_TX_ACTIVE, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) mutex_unlock(&intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) /* Ignore errors, device can work without DDC parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) btintel_load_ddc_config(hdev, fwname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_CMD_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) if (IS_ERR(skb))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) return PTR_ERR(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) if (speed_change) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) err = intel_set_baudrate(hu, oper_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) bt_dev_info(hdev, "Setup complete");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) clear_bit(STATE_BOOTLOADER, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) static int intel_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) struct hci_uart *hu = hci_get_drvdata(hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) struct hci_event_hdr *hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) if (!test_bit(STATE_BOOTLOADER, &intel->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) !test_bit(STATE_BOOTING, &intel->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) goto recv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) hdr = (void *)skb->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) /* When the firmware loading completes the device sends
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) * out a vendor specific event indicating the result of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) * the firmware loading.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) if (skb->len == 7 && hdr->evt == 0xff && hdr->plen == 0x05 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) skb->data[2] == 0x06) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) if (skb->data[3] != 0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) set_bit(STATE_FIRMWARE_FAILED, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) if (test_and_clear_bit(STATE_DOWNLOADING, &intel->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) test_bit(STATE_FIRMWARE_LOADED, &intel->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) wake_up_bit(&intel->flags, STATE_DOWNLOADING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) /* When switching to the operational firmware the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) * sends a vendor specific event indicating that the bootup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) * completed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) } else if (skb->len == 9 && hdr->evt == 0xff && hdr->plen == 0x07 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) skb->data[2] == 0x02) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) if (test_and_clear_bit(STATE_BOOTING, &intel->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) wake_up_bit(&intel->flags, STATE_BOOTING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) recv:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) return hci_recv_frame(hdev, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) static void intel_recv_lpm_notify(struct hci_dev *hdev, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) struct hci_uart *hu = hci_get_drvdata(hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) bt_dev_dbg(hdev, "TX idle notification (%d)", value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) if (value) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) set_bit(STATE_TX_ACTIVE, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) schedule_work(&intel->busy_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) clear_bit(STATE_TX_ACTIVE, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) static int intel_recv_lpm(struct hci_dev *hdev, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) struct hci_lpm_pkt *lpm = (void *)skb->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) struct hci_uart *hu = hci_get_drvdata(hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) switch (lpm->opcode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) case LPM_OP_TX_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) if (lpm->dlen < 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) bt_dev_err(hu->hdev, "Invalid LPM notification packet");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) intel_recv_lpm_notify(hdev, lpm->data[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) case LPM_OP_SUSPEND_ACK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) set_bit(STATE_SUSPENDED, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) case LPM_OP_RESUME_ACK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) clear_bit(STATE_SUSPENDED, &intel->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) bt_dev_err(hdev, "Unknown LPM opcode (%02x)", lpm->opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) #define INTEL_RECV_LPM \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) .type = HCI_LPM_PKT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) .hlen = HCI_LPM_HDR_SIZE, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) .loff = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) .lsize = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) .maxlen = HCI_LPM_MAX_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) static const struct h4_recv_pkt intel_recv_pkts[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) { H4_RECV_ACL, .recv = hci_recv_frame },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) { H4_RECV_SCO, .recv = hci_recv_frame },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) { H4_RECV_EVENT, .recv = intel_recv_event },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) { INTEL_RECV_LPM, .recv = intel_recv_lpm },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) static int intel_recv(struct hci_uart *hu, const void *data, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) return -EUNATCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) intel->rx_skb = h4_recv_buf(hu->hdev, intel->rx_skb, data, count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) intel_recv_pkts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) ARRAY_SIZE(intel_recv_pkts));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) if (IS_ERR(intel->rx_skb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) int err = PTR_ERR(intel->rx_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) intel->rx_skb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) static int intel_enqueue(struct hci_uart *hu, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) struct intel_device *idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) BT_DBG("hu %p skb %p", hu, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) if (!hu->tty->dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) goto out_enqueue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) /* Be sure our controller is resumed and potential LPM transaction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) * completed before enqueuing any packet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) mutex_lock(&intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) list_for_each_entry(idev, &intel_device_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) if (hu->tty->dev->parent == idev->pdev->dev.parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) pm_runtime_get_sync(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) pm_runtime_mark_last_busy(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) pm_runtime_put_autosuspend(&idev->pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) mutex_unlock(&intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) out_enqueue:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) skb_queue_tail(&intel->txq, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) static struct sk_buff *intel_dequeue(struct hci_uart *hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) struct intel_data *intel = hu->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) skb = skb_dequeue(&intel->txq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) if (!skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) return skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) if (test_bit(STATE_BOOTLOADER, &intel->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) (hci_skb_pkt_type(skb) == HCI_COMMAND_PKT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) struct hci_command_hdr *cmd = (void *)skb->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) __u16 opcode = le16_to_cpu(cmd->opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) /* When the 0xfc01 command is issued to boot into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) * the operational firmware, it will actually not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) * send a command complete event. To keep the flow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) * control working inject that event here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) if (opcode == 0xfc01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) inject_cmd_complete(hu->hdev, opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) /* Prepend skb with frame type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) return skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) static const struct hci_uart_proto intel_proto = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) .id = HCI_UART_INTEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) .name = "Intel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) .manufacturer = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) .init_speed = 115200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) .oper_speed = 3000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) .open = intel_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) .close = intel_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) .flush = intel_flush,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) .setup = intel_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) .set_baudrate = intel_set_baudrate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) .recv = intel_recv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) .enqueue = intel_enqueue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) .dequeue = intel_dequeue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) static const struct acpi_device_id intel_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) { "INT33E1", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) { "INT33E3", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) MODULE_DEVICE_TABLE(acpi, intel_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) static int intel_suspend_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) struct intel_device *idev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) mutex_lock(&idev->hu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) if (idev->hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) intel_lpm_suspend(idev->hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) mutex_unlock(&idev->hu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) static int intel_resume_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) struct intel_device *idev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) mutex_lock(&idev->hu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) if (idev->hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) intel_lpm_resume(idev->hu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) mutex_unlock(&idev->hu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) static int intel_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) struct intel_device *idev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) enable_irq_wake(idev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) return intel_suspend_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) static int intel_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) struct intel_device *idev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) disable_irq_wake(idev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) return intel_resume_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) static const struct dev_pm_ops intel_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) SET_SYSTEM_SLEEP_PM_OPS(intel_suspend, intel_resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) SET_RUNTIME_PM_OPS(intel_suspend_device, intel_resume_device, NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) static const struct acpi_gpio_params host_wake_gpios = { 1, 0, false };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) static const struct acpi_gpio_mapping acpi_hci_intel_gpios[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) { "reset-gpios", &reset_gpios, 1, ACPI_GPIO_QUIRK_ONLY_GPIOIO },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) { "host-wake-gpios", &host_wake_gpios, 1, ACPI_GPIO_QUIRK_ONLY_GPIOIO },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) static int intel_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) struct intel_device *idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) idev = devm_kzalloc(&pdev->dev, sizeof(*idev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) if (!idev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) mutex_init(&idev->hu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) idev->pdev = pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) ret = devm_acpi_dev_add_driver_gpios(&pdev->dev, acpi_hci_intel_gpios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) dev_dbg(&pdev->dev, "Unable to add GPIO mapping table\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) idev->reset = devm_gpiod_get(&pdev->dev, "reset", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) if (IS_ERR(idev->reset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) dev_err(&pdev->dev, "Unable to retrieve gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) return PTR_ERR(idev->reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) idev->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) if (idev->irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) struct gpio_desc *host_wake;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) dev_err(&pdev->dev, "No IRQ, falling back to gpio-irq\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) host_wake = devm_gpiod_get(&pdev->dev, "host-wake", GPIOD_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) if (IS_ERR(host_wake)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) dev_err(&pdev->dev, "Unable to retrieve IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) goto no_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) idev->irq = gpiod_to_irq(host_wake);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) if (idev->irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) dev_err(&pdev->dev, "No corresponding irq for gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) goto no_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) /* Only enable wake-up/irq when controller is powered */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) device_set_wakeup_capable(&pdev->dev, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) device_wakeup_disable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) no_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) platform_set_drvdata(pdev, idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) /* Place this instance on the device list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) mutex_lock(&intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) list_add_tail(&idev->list, &intel_device_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) mutex_unlock(&intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) dev_info(&pdev->dev, "registered, gpio(%d)/irq(%d).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) desc_to_gpio(idev->reset), idev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) static int intel_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) struct intel_device *idev = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) device_wakeup_disable(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) mutex_lock(&intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) list_del(&idev->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) mutex_unlock(&intel_device_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) dev_info(&pdev->dev, "unregistered.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) static struct platform_driver intel_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) .probe = intel_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) .remove = intel_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) .name = "hci_intel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) .acpi_match_table = ACPI_PTR(intel_acpi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) .pm = &intel_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) int __init intel_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) platform_driver_register(&intel_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) return hci_uart_register_proto(&intel_proto);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) int __exit intel_deinit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) platform_driver_unregister(&intel_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) return hci_uart_unregister_proto(&intel_proto);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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