^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Bluetooth support for Broadcom devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2015 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define BCM_UART_CLOCK_48MHZ 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define BCM_UART_CLOCK_24MHZ 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) struct bcm_update_uart_baud_rate {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) __le16 zero;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) __le32 baud_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct bcm_write_uart_clock_setting {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) __u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct bcm_set_sleep_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) __u8 sleep_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) __u8 idle_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) __u8 idle_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) __u8 bt_wake_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) __u8 host_wake_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) __u8 allow_host_sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) __u8 combine_modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) __u8 tristate_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) __u8 usb_auto_sleep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) __u8 usb_resume_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) __u8 break_to_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) __u8 pulsed_host_wake;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct bcm_set_pcm_int_params {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) __u8 routing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) __u8 rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) __u8 frame_sync;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) __u8 sync_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) __u8 clock_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct bcm_set_pcm_format_params {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) __u8 lsb_first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) __u8 fill_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) __u8 fill_method;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) __u8 fill_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) __u8 right_justify;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #if IS_ENABLED(CONFIG_BT_BCM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int btbcm_check_bdaddr(struct hci_dev *hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) int btbcm_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int btbcm_patchram(struct hci_dev *hdev, const struct firmware *fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) int btbcm_read_pcm_int_params(struct hci_dev *hdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct bcm_set_pcm_int_params *params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) int btbcm_write_pcm_int_params(struct hci_dev *hdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) const struct bcm_set_pcm_int_params *params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int btbcm_setup_patchram(struct hci_dev *hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int btbcm_setup_apple(struct hci_dev *hdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int btbcm_initialize(struct hci_dev *hdev, bool *fw_load_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int btbcm_finalize(struct hci_dev *hdev, bool *fw_load_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static inline int btbcm_check_bdaddr(struct hci_dev *hdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static inline int btbcm_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static inline int btbcm_read_pcm_int_params(struct hci_dev *hdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct bcm_set_pcm_int_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static inline int btbcm_write_pcm_int_params(struct hci_dev *hdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) const struct bcm_set_pcm_int_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static inline int btbcm_patchram(struct hci_dev *hdev, const struct firmware *fw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static inline int btbcm_setup_patchram(struct hci_dev *hdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static inline int btbcm_setup_apple(struct hci_dev *hdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static inline int btbcm_initialize(struct hci_dev *hdev, bool *fw_load_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static inline int btbcm_finalize(struct hci_dev *hdev, bool *fw_load_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #endif