^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (C) 2001 San Mehat <nettwerk@valinux.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This driver for the Micro Memory PCI Memory Module with Battery Backup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * This driver provides a standard block device interface for Micro Memory(tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * PCI based RAM boards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * 10/05/01: Phap Nguyen - Rebuilt the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * - use stand disk partitioning (so fdisk works).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * - incorporate into main kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * - use spin_lock_bh instead of _irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * - Never block on make_request. queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * bh's instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * - unregister umem from devfs at mod unload
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * - Change version to 2.3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * 15May2002:NeilBrown - convert to bio for 2.5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * - a sequence of writes that cover the card, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * - set initialised bit then.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/bio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/mman.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/gfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/ioctl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <linux/fcntl.h> /* O_ACCMODE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/hdreg.h> /* HDIO_GETGEO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include "umem.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define MM_MAXCARDS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define MM_RAHEAD 2 /* two sectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define MM_BLKSIZE 1024 /* 1k blocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define MM_HARDSECT 512 /* 512-byte hardware sectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define MM_SHIFT 6 /* max 64 partitions on 4 cards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * Version Information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define DRIVER_NAME "umem"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define DRIVER_VERSION "v2.3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static int debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define HW_TRACE(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define DEBUG_LED_ON_TRANSFER 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define DEBUG_BATTERY_POLLING 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) module_param(debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MODULE_PARM_DESC(debug, "Debug bitmask");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static int pci_read_cmd = 0x0C; /* Read Multiple */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) module_param(pci_read_cmd, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static int pci_write_cmd = 0x0F; /* Write and Invalidate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) module_param(pci_write_cmd, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static int pci_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static int major_nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #include <linux/blkpg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct cardinfo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct pci_dev *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned char __iomem *csr_remap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) unsigned int mm_size; /* size in kbytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) unsigned int init_size; /* initial segment, in sectors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * that we know to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * have been written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct bio *bio, *currentbio, **biotail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct bvec_iter current_iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct request_queue *queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct mm_page {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) dma_addr_t page_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct mm_dma_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int cnt, headcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct bio *bio, **biotail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct bvec_iter iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) } mm_pages[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int Active, Ready;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct tasklet_struct tasklet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned int dma_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int good;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int warned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) unsigned long last_change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) } battery[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int check_batteries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static struct cardinfo cards[MM_MAXCARDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static struct timer_list battery_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int num_cards;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static struct gendisk *mm_gendisk[MM_MAXCARDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static void check_batteries(struct cardinfo *card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static int get_userbit(struct cardinfo *card, int bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) unsigned char led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return led & bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) unsigned char led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) led |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) led &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * NOTE: For the power LED, use the LED_POWER_* macros since they differ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static void set_led(struct cardinfo *card, int shift, unsigned char state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) unsigned char led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (state == LED_FLIP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) led ^= (1<<shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) led &= ~(0x03 << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) led |= (state << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #ifdef MM_DIAG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static void dump_regs(struct cardinfo *card)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) unsigned char *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) int i, i1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) p = card->csr_remap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) for (i = 0; i < 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) printk(KERN_DEBUG "%p ", p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) for (i1 = 0; i1 < 16; i1++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) printk("%02x ", *p++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (dmastat & DMASCR_ANY_ERR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) printk(KERN_CONT "ANY_ERR ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (dmastat & DMASCR_MBE_ERR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) printk(KERN_CONT "MBE_ERR ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (dmastat & DMASCR_PARITY_ERR_REP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) printk(KERN_CONT "PARITY_ERR_REP ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (dmastat & DMASCR_PARITY_ERR_DET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) printk(KERN_CONT "PARITY_ERR_DET ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (dmastat & DMASCR_SYSTEM_ERR_SIG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) printk(KERN_CONT "SYSTEM_ERR_SIG ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (dmastat & DMASCR_TARGET_ABT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) printk(KERN_CONT "TARGET_ABT ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (dmastat & DMASCR_MASTER_ABT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) printk(KERN_CONT "MASTER_ABT ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (dmastat & DMASCR_CHAIN_COMPLETE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) printk(KERN_CONT "CHAIN_COMPLETE ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (dmastat & DMASCR_DMA_COMPLETE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) printk(KERN_CONT "DMA_COMPLETE ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * Theory of request handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * We have two pages of mm_dma_desc, holding about 64 descriptors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * each. These are allocated at init time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * One page is "Ready" and is either full, or can have request added.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * The other page might be "Active", which DMA is happening on it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * Whenever IO on the active page completes, the Ready page is activated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * and the ex-Active page is clean out and made Ready.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * Otherwise the Ready page is only activated when it becomes full.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * If a request arrives while both pages a full, it is queued, and b_rdev is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * overloaded to record whether it was a read or a write.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * The interrupt handler only polls the device to clear the interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * The processing of the result is done in a tasklet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static void mm_start_io(struct cardinfo *card)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /* we have the lock, we know there is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * no IO active, and we know that card->Active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * is set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) struct mm_dma_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct mm_page *page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) /* make the last descriptor end the chain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) page = &card->mm_pages[card->Active];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) pr_debug("start_io: %d %d->%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) card->Active, page->headcnt, page->cnt - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) desc = &page->desc[page->cnt-1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) desc->sem_control_bits = desc->control_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (debug & DEBUG_LED_ON_TRANSFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) set_led(card, LED_REMOVE, LED_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) desc = &page->desc[page->headcnt];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) writel(0, card->csr_remap + DMA_PCI_ADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) writel(0, card->csr_remap + DMA_LOCAL_ADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) offset = ((char *)desc) - ((char *)page->desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) card->csr_remap + DMA_DESCRIPTOR_ADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* Force the value to u64 before shifting otherwise >> 32 is undefined C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * and on some ports will do nothing ! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) writel(cpu_to_le32(((u64)page->page_dma)>>32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* Go, go, go */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) card->csr_remap + DMA_STATUS_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static int add_bio(struct cardinfo *card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static void activate(struct cardinfo *card)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /* if No page is Active, and Ready is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * not empty, then switch Ready page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * to active and start IO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * Then add any bh's that are available to Ready
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) while (add_bio(card))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (card->Active == -1 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) card->mm_pages[card->Ready].cnt > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) card->Active = card->Ready;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) card->Ready = 1-card->Ready;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) mm_start_io(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) } while (card->Active == -1 && add_bio(card));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static inline void reset_page(struct mm_page *page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) page->cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) page->headcnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) page->bio = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) page->biotail = &page->bio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * If there is room on Ready page, take
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) * one bh off list and add it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) * return 1 if there was room, else 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static int add_bio(struct cardinfo *card)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) struct mm_page *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct mm_dma_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) dma_addr_t dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct bio *bio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) struct bio_vec vec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) bio = card->currentbio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (!bio && card->bio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) card->currentbio = card->bio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) card->current_iter = card->bio->bi_iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) card->bio = card->bio->bi_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (card->bio == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) card->biotail = &card->bio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) card->currentbio->bi_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (!bio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) vec = bio_iter_iovec(bio, card->current_iter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) dma_handle = dma_map_page(&card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) vec.bv_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) vec.bv_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) vec.bv_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) bio_op(bio) == REQ_OP_READ ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) DMA_FROM_DEVICE : DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) p = &card->mm_pages[card->Ready];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) desc = &p->desc[p->cnt];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) p->cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (p->bio == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) p->iter = card->current_iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if ((p->biotail) != &bio->bi_next) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) *(p->biotail) = bio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) p->biotail = &(bio->bi_next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) bio->bi_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) desc->data_dma_handle = dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) desc->local_addr = cpu_to_le64(card->current_iter.bi_sector << 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) desc->transfer_size = cpu_to_le32(vec.bv_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) desc->zero1 = desc->zero2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) offset = (((char *)(desc+1)) - ((char *)p->desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) DMASCR_PARITY_INT_EN|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) DMASCR_CHAIN_EN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) DMASCR_SEM_EN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) pci_cmds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) if (bio_op(bio) == REQ_OP_WRITE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) desc->sem_control_bits = desc->control_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) bio_advance_iter(bio, &card->current_iter, vec.bv_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (!card->current_iter.bi_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) card->currentbio = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static void process_page(unsigned long data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) /* check if any of the requests in the page are DMA_COMPLETE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * and deal with them appropriately.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) * If we find a descriptor without DMA_COMPLETE in the semaphore, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * dma must have hit an error on that descriptor, so use dma_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * instead and assume that all following descriptors must be re-tried.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct mm_page *page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct bio *return_bio = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) struct cardinfo *card = (struct cardinfo *)data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) unsigned int dma_status = card->dma_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) spin_lock(&card->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (card->Active < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) page = &card->mm_pages[card->Active];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) while (page->headcnt < page->cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) struct bio *bio = page->bio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) struct mm_dma_desc *desc = &page->desc[page->headcnt];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) int control = le32_to_cpu(desc->sem_control_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) int last = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) struct bio_vec vec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) if (!(control & DMASCR_DMA_COMPLETE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) control = dma_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) last = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) page->headcnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) vec = bio_iter_iovec(bio, page->iter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) bio_advance_iter(bio, &page->iter, vec.bv_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (!page->iter.bi_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) page->bio = bio->bi_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (page->bio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) page->iter = page->bio->bi_iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) dma_unmap_page(&card->dev->dev, desc->data_dma_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) vec.bv_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) (control & DMASCR_TRANSFER_READ) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) DMA_TO_DEVICE : DMA_FROM_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (control & DMASCR_HARD_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) /* error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) bio->bi_status = BLK_STS_IOERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) dev_printk(KERN_WARNING, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) "I/O error on sector %d/%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) le32_to_cpu(desc->local_addr)>>9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) le32_to_cpu(desc->transfer_size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) dump_dmastat(card, control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) } else if (op_is_write(bio_op(bio)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) le32_to_cpu(desc->local_addr) >> 9 ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) card->init_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) if (card->init_size >> 1 >= card->mm_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) dev_printk(KERN_INFO, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) "memory now initialised\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) set_userbit(card, MEMORY_INITIALIZED, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if (bio != page->bio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) bio->bi_next = return_bio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) return_bio = bio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) if (last)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (debug & DEBUG_LED_ON_TRANSFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) set_led(card, LED_REMOVE, LED_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) if (card->check_batteries) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) card->check_batteries = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) check_batteries(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (page->headcnt >= page->cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) reset_page(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) card->Active = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) activate(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /* haven't finished with this one yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) pr_debug("do some more\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) mm_start_io(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) out_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) spin_unlock(&card->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) while (return_bio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) struct bio *bio = return_bio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) return_bio = bio->bi_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) bio->bi_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) bio_endio(bio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static void mm_unplug(struct blk_plug_cb *cb, bool from_schedule)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) struct cardinfo *card = cb->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) spin_lock_irq(&card->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) activate(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) spin_unlock_irq(&card->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) kfree(cb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static int mm_check_plugged(struct cardinfo *card)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) return !!blk_check_plugged(mm_unplug, card, sizeof(struct blk_plug_cb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) static blk_qc_t mm_submit_bio(struct bio *bio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) struct cardinfo *card = bio->bi_disk->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) pr_debug("mm_make_request %llu %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) (unsigned long long)bio->bi_iter.bi_sector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) bio->bi_iter.bi_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) blk_queue_split(&bio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) spin_lock_irq(&card->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) *card->biotail = bio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) bio->bi_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) card->biotail = &bio->bi_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) if (op_is_sync(bio->bi_opf) || !mm_check_plugged(card))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) activate(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) spin_unlock_irq(&card->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return BLK_QC_T_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static irqreturn_t mm_interrupt(int irq, void *__card)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) struct cardinfo *card = (struct cardinfo *) __card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) unsigned int dma_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) unsigned short cfg_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) HW_TRACE(0x30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) /* interrupt wasn't for me ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) /* clear COMPLETION interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) if (card->flags & UM_FLAG_NO_BYTE_STATUS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) card->csr_remap + DMA_STATUS_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) card->csr_remap + DMA_STATUS_CTRL + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) /* log errors and clear interrupt status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) if (dma_status & DMASCR_ANY_ERR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) unsigned int data_log1, data_log2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) unsigned int addr_log1, addr_log2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) unsigned char stat, count, syndrome, check;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) data_log1 = le32_to_cpu(readl(card->csr_remap +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) ERROR_DATA_LOG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) data_log2 = le32_to_cpu(readl(card->csr_remap +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) ERROR_DATA_LOG + 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) addr_log1 = le32_to_cpu(readl(card->csr_remap +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) ERROR_ADDR_LOG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) count = readb(card->csr_remap + ERROR_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) syndrome = readb(card->csr_remap + ERROR_SYNDROME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) check = readb(card->csr_remap + ERROR_CHECK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) dump_dmastat(card, dma_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (stat & 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) dev_printk(KERN_ERR, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) "Memory access error detected (err count %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) if (stat & 0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) dev_printk(KERN_ERR, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) "Multi-bit EDC error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) dev_printk(KERN_ERR, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) addr_log2, addr_log1, data_log2, data_log1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) dev_printk(KERN_ERR, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) check, syndrome);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) writeb(0, card->csr_remap + ERROR_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if (dma_status & DMASCR_PARITY_ERR_REP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) dev_printk(KERN_ERR, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) "PARITY ERROR REPORTED\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) if (dma_status & DMASCR_PARITY_ERR_DET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) dev_printk(KERN_ERR, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) "PARITY ERROR DETECTED\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) if (dma_status & DMASCR_TARGET_ABT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) if (dma_status & DMASCR_MASTER_ABT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) /* and process the DMA descriptors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) card->dma_status = dma_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) tasklet_schedule(&card->tasklet);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) HW_TRACE(0x36);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) * If both batteries are good, no LED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) * If either battery has been warned, solid LED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) * If both batteries are bad, flash the LED quickly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) * If either battery is bad, flash the LED semi quickly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) static void set_fault_to_battery_status(struct cardinfo *card)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) if (card->battery[0].good && card->battery[1].good)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) set_led(card, LED_FAULT, LED_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) else if (card->battery[0].warned || card->battery[1].warned)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) set_led(card, LED_FAULT, LED_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) else if (!card->battery[0].good && !card->battery[1].good)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) set_led(card, LED_FAULT, LED_FLASH_7_0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) set_led(card, LED_FAULT, LED_FLASH_3_5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) static void init_battery_timer(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) static int check_battery(struct cardinfo *card, int battery, int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (status != card->battery[battery].good) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) card->battery[battery].good = !card->battery[battery].good;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) card->battery[battery].last_change = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) if (card->battery[battery].good) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) dev_printk(KERN_ERR, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) "Battery %d now good\n", battery + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) card->battery[battery].warned = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) dev_printk(KERN_ERR, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) "Battery %d now FAILED\n", battery + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) } else if (!card->battery[battery].good &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) !card->battery[battery].warned &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) time_after_eq(jiffies, card->battery[battery].last_change +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) (HZ * 60 * 60 * 5))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) dev_printk(KERN_ERR, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) "Battery %d still FAILED after 5 hours\n", battery + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) card->battery[battery].warned = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) static void check_batteries(struct cardinfo *card)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) /* NOTE: this must *never* be called while the card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) * is doing (bus-to-card) DMA, or you will need the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) * reset switch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) unsigned char status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) int ret1, ret2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (debug & DEBUG_BATTERY_POLLING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) dev_printk(KERN_DEBUG, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) "checking battery status, 1 = %s, 2 = %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) if (ret1 || ret2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) set_fault_to_battery_status(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) static void check_all_batteries(struct timer_list *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) for (i = 0; i < num_cards; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) struct cardinfo *card = &cards[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) spin_lock_bh(&card->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) if (card->Active >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) card->check_batteries = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) check_batteries(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) spin_unlock_bh(&card->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) init_battery_timer();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) static void init_battery_timer(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) timer_setup(&battery_timer, check_all_batteries, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) battery_timer.expires = jiffies + (HZ * 60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) add_timer(&battery_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) static void del_battery_timer(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) del_timer(&battery_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * Note no locks taken out here. In a worst case scenario, we could drop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * a chunk of system memory. But that should never happen, since validation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) * happens at open or mount time, when locks are held.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * That's crap, since doing that while some partitions are opened
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) * or mounted will give you really nasty results.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) static int mm_revalidate(struct gendisk *disk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) struct cardinfo *card = disk->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) set_capacity(disk, card->mm_size << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) struct cardinfo *card = bdev->bd_disk->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) int size = card->mm_size * (1024 / MM_HARDSECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) * get geometry: we have to fake one... trim the size to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) * whatever cylinders.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) geo->heads = 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) geo->sectors = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) geo->cylinders = size / (geo->heads * geo->sectors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) static const struct block_device_operations mm_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) .submit_bio = mm_submit_bio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) .getgeo = mm_getgeo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) .revalidate_disk = mm_revalidate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) static int mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) struct cardinfo *card = &cards[num_cards];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) unsigned char mem_present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) unsigned char batt_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) unsigned int saved_bar, data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) unsigned long csr_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) unsigned long csr_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) int magic_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) static int printed_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) if (!printed_version++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) ret = pci_enable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) pci_set_master(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) card->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) csr_base = pci_resource_start(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) csr_len = pci_resource_len(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (!csr_base || !csr_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) dev_printk(KERN_INFO, &dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) if (dma_set_mask(&dev->dev, DMA_BIT_MASK(64)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) dma_set_mask(&dev->dev, DMA_BIT_MASK(32))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) ret = pci_request_regions(dev, DRIVER_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) dev_printk(KERN_ERR, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) "Unable to request memory region\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) goto failed_req_csr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) card->csr_remap = ioremap(csr_base, csr_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) if (!card->csr_remap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) dev_printk(KERN_ERR, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) "Unable to remap memory region\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) goto failed_remap_csr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) dev_printk(KERN_INFO, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) "CSR 0x%08lx -> 0x%p (0x%lx)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) csr_base, card->csr_remap, csr_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) switch (card->dev->device) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) case 0x5415:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) magic_number = 0x59;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) case 0x5425:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) card->flags |= UM_FLAG_NO_BYTE_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) magic_number = 0x5C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) case 0x6155:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) card->flags |= UM_FLAG_NO_BYTE_STATUS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) magic_number = 0x99;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) magic_number = 0x100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) goto failed_magic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) card->mm_pages[0].desc = dma_alloc_coherent(&card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) PAGE_SIZE * 2, &card->mm_pages[0].page_dma, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) card->mm_pages[1].desc = dma_alloc_coherent(&card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) PAGE_SIZE * 2, &card->mm_pages[1].page_dma, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) if (card->mm_pages[0].desc == NULL ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) card->mm_pages[1].desc == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) goto failed_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) reset_page(&card->mm_pages[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) reset_page(&card->mm_pages[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) card->Ready = 0; /* page 0 is ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) card->Active = -1; /* no page is active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) card->bio = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) card->biotail = &card->bio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) spin_lock_init(&card->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) card->queue = blk_alloc_queue(NUMA_NO_NODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) if (!card->queue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) goto failed_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) tasklet_init(&card->tasklet, process_page, (unsigned long)card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) card->check_batteries = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) switch (mem_present) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) case MEM_128_MB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) card->mm_size = 1024 * 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) case MEM_256_MB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) card->mm_size = 1024 * 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) case MEM_512_MB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) card->mm_size = 1024 * 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) case MEM_1_GB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) card->mm_size = 1024 * 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) case MEM_2_GB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) card->mm_size = 1024 * 2048;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) card->mm_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) /* Clear the LED's we control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) set_led(card, LED_REMOVE, LED_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) set_led(card, LED_FAULT, LED_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) card->battery[0].last_change = card->battery[1].last_change = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) if (card->flags & UM_FLAG_NO_BATT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) dev_printk(KERN_INFO, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) "Size %d KB\n", card->mm_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) dev_printk(KERN_INFO, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) card->mm_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) card->battery[0].good ? "OK" : "FAILURE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) card->battery[1].good ? "OK" : "FAILURE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) set_fault_to_battery_status(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) data = 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) data &= 0xfffffff0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) data = ~data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) data += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) card)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) dev_printk(KERN_ERR, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) "Unable to allocate IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) goto failed_req_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) dev_printk(KERN_INFO, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) "Window size %d bytes, IRQ %d\n", data, dev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) pci_set_drvdata(dev, card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) pci_write_cmd = 0x07; /* then Memory Write command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) unsigned short cfg_command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) pci_write_config_word(dev, PCI_COMMAND, cfg_command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) num_cards++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) if (!get_userbit(card, MEMORY_INITIALIZED)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) dev_printk(KERN_INFO, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) "memory NOT initialized. Consider over-writing whole device.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) card->init_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) dev_printk(KERN_INFO, &card->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) "memory already initialized\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) card->init_size = card->mm_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) /* Enable ECC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) failed_req_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) failed_alloc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) if (card->mm_pages[0].desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) card->mm_pages[0].desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) card->mm_pages[0].page_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) if (card->mm_pages[1].desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) card->mm_pages[1].desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) card->mm_pages[1].page_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) failed_magic:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) iounmap(card->csr_remap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) failed_remap_csr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) pci_release_regions(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) failed_req_csr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) static void mm_pci_remove(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) struct cardinfo *card = pci_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) tasklet_kill(&card->tasklet);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) free_irq(dev->irq, card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) iounmap(card->csr_remap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) if (card->mm_pages[0].desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) card->mm_pages[0].desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) card->mm_pages[0].page_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) if (card->mm_pages[1].desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) card->mm_pages[1].desc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) card->mm_pages[1].page_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) blk_cleanup_queue(card->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) pci_release_regions(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) pci_disable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) static const struct pci_device_id mm_pci_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) .vendor = 0x8086,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) .device = 0xB555,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) .subvendor = 0x1332,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) .subdevice = 0x5460,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) .class = 0x050000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) .class_mask = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) }, { /* end: all zeroes */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) MODULE_DEVICE_TABLE(pci, mm_pci_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) static struct pci_driver mm_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) .name = DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) .id_table = mm_pci_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) .probe = mm_pci_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) .remove = mm_pci_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) static int __init mm_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) int retval, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) retval = pci_register_driver(&mm_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) err = major_nr = register_blkdev(0, DRIVER_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) pci_unregister_driver(&mm_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) for (i = 0; i < num_cards; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) if (!mm_gendisk[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) for (i = 0; i < num_cards; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) struct gendisk *disk = mm_gendisk[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) sprintf(disk->disk_name, "umem%c", 'a'+i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) spin_lock_init(&cards[i].lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) disk->major = major_nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) disk->first_minor = i << MM_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) disk->fops = &mm_fops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) disk->private_data = &cards[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) disk->queue = cards[i].queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) set_capacity(disk, cards[i].mm_size << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) add_disk(disk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) init_battery_timer();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) /* printk("mm_init: Done. 10-19-01 9:00\n"); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) pci_unregister_driver(&mm_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) unregister_blkdev(major_nr, DRIVER_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) while (i--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) put_disk(mm_gendisk[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) static void __exit mm_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) del_battery_timer();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) for (i = 0; i < num_cards ; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) del_gendisk(mm_gendisk[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) put_disk(mm_gendisk[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) pci_unregister_driver(&mm_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) unregister_blkdev(major_nr, DRIVER_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) module_init(mm_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) module_exit(mm_cleanup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) MODULE_AUTHOR(DRIVER_AUTHOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) MODULE_DESCRIPTION(DRIVER_DESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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