^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) fit2.c (c) 1998 Grant R. Guenther <grant@torque.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Under the terms of the GNU General Public License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) fit2.c is a low-level protocol driver for the older version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) of the Fidelity International Technology parallel port adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) This adapter is used in their TransDisk 2000 and older TransDisk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) 3000 portable hard-drives. As far as I can tell, this device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) supports 4-bit mode _only_.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Newer models of the FIT products use an enhanced protocol.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) The "fit3" protocol module should support current drives.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define FIT2_VERSION "1.0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "paride.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define j44(a,b) (((a>>4)&0x0f)|(b&0xf0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* cont = 0 - access the IDE register file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) cont = 1 - access the IDE command set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) NB: The FIT adapter does not appear to use the control registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) So, we map ALT_STATUS to STATUS and NO-OP writes to the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) control register - this means that IDE reset will not work on these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static void fit2_write_regr( PIA *pi, int cont, int regr, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) { if (cont == 1) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) w2(0xc); w0(regr); w2(4); w0(val); w2(5); w0(0); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static int fit2_read_regr( PIA *pi, int cont, int regr )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) { int a, b, r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (cont) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) if (regr != 6) return 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) r = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) } else r = regr + 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) w2(0xc); w0(r); w2(4); w2(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) w0(0); a = r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) w0(1); b = r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return j44(a,b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static void fit2_read_block( PIA *pi, char * buf, int count )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) { int k, a, b, c, d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) w2(0xc); w0(0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) for (k=0;k<count/4;k++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) w2(4); w2(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) w0(0); a = r1(); w0(1); b = r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) w0(3); c = r1(); w0(2); d = r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) buf[4*k+0] = j44(a,b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) buf[4*k+1] = j44(d,c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) w2(4); w2(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) a = r1(); w0(3); b = r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) w0(1); c = r1(); w0(0); d = r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) buf[4*k+2] = j44(d,c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) buf[4*k+3] = j44(a,b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static void fit2_write_block( PIA *pi, char * buf, int count )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) { int k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) w2(0xc); w0(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) for (k=0;k<count/2;k++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) w2(4); w0(buf[2*k]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) w2(5); w0(buf[2*k+1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static void fit2_connect ( PIA *pi )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) { pi->saved_r0 = r0();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) pi->saved_r2 = r2();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) w2(0xcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static void fit2_disconnect ( PIA *pi )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) { w0(pi->saved_r0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) w2(pi->saved_r2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static void fit2_log_adapter( PIA *pi, char * scratch, int verbose )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) { printk("%s: fit2 %s, FIT 2000 adapter at 0x%x, delay %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) pi->device,FIT2_VERSION,pi->port,pi->delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static struct pi_protocol fit2 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .name = "fit2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .max_mode = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .epp_first = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .default_delay = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .max_units = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .write_regr = fit2_write_regr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .read_regr = fit2_read_regr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .write_block = fit2_write_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .read_block = fit2_read_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .connect = fit2_connect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .disconnect = fit2_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .log_adapter = fit2_log_adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int __init fit2_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return paride_register(&fit2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static void __exit fit2_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) paride_unregister(&fit2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) module_init(fit2_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) module_exit(fit2_exit)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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