^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) epat.c (c) 1997-8 Grant R. Guenther <grant@torque.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Under the terms of the GNU General Public License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) This is the low level protocol driver for the EPAT parallel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) to IDE adapter from Shuttle Technologies. This adapter is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) used in many popular parallel port disk products such as the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) SyQuest EZ drives, the Avatar Shark and the Imation SuperDisk.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /* Changes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 1.01 GRG 1998.05.06 init_proto, release_proto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 1.02 Joshua b. Jore CPP(renamed), epat_connect, epat_disconnect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define EPAT_VERSION "1.02"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include "paride.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define j44(a,b) (((a>>4)&0x0f)+(b&0xf0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define j53(a,b) (((a>>3)&0x1f)+((b<<4)&0xe0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static int epatc8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) module_param(epatc8, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MODULE_PARM_DESC(epatc8, "support for the Shuttle EP1284 chip, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) "used in any recent Imation SuperDisk (LS-120) drive.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* cont = 0 IDE register file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) cont = 1 IDE control registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) cont = 2 internal EPAT registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int cont_map[3] = { 0x18, 0x10, 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static void epat_write_regr( PIA *pi, int cont, int regr, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) { int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) r = regr + cont_map[cont];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) switch (pi->mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) case 2: w0(0x60+r); w2(1); w0(val); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) case 5: w3(0x40+r); w4(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int epat_read_regr( PIA *pi, int cont, int regr )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) { int a, b, r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) r = regr + cont_map[cont];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) switch (pi->mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) case 0: w0(r); w2(1); w2(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) a = r1(); w2(4); b = r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return j44(a,b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) case 1: w0(0x40+r); w2(1); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) a = r1(); b = r2(); w0(0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return j53(a,b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) case 2: w0(0x20+r); w2(1); w2(0x25);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) a = r0(); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) case 5: w3(r); w2(0x24); a = r4(); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return -1; /* never gets here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static void epat_read_block( PIA *pi, char * buf, int count )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) { int k, ph, a, b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) switch (pi->mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) case 0: w0(7); w2(1); w2(3); w0(0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ph = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) for(k=0;k<count;k++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (k == count-1) w0(0xfd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) w2(6+ph); a = r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (a & 8) b = a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) else { w2(4+ph); b = r1(); }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) buf[k] = j44(a,b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) ph = 1 - ph;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) w0(0); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) case 1: w0(0x47); w2(1); w2(5); w0(0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ph = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) for(k=0;k<count;k++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (k == count-1) w0(0xfd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) w2(4+ph);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) a = r1(); b = r2();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) buf[k] = j53(a,b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ph = 1 - ph;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) w0(0); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) case 2: w0(0x27); w2(1); w2(0x25); w0(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ph = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) for(k=0;k<count-1;k++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) w2(0x24+ph);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) buf[k] = r0();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) ph = 1 - ph;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) w2(0x26); w2(0x27); buf[count-1] = r0();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) w2(0x25); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) case 3: w3(0x80); w2(0x24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) for(k=0;k<count-1;k++) buf[k] = r4();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) w2(4); w3(0xa0); w2(0x24); buf[count-1] = r4();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) case 4: w3(0x80); w2(0x24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) for(k=0;k<(count/2)-1;k++) ((u16 *)buf)[k] = r4w();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) buf[count-2] = r4();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) w2(4); w3(0xa0); w2(0x24); buf[count-1] = r4();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) case 5: w3(0x80); w2(0x24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) for(k=0;k<(count/4)-1;k++) ((u32 *)buf)[k] = r4l();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) for(k=count-4;k<count-1;k++) buf[k] = r4();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) w2(4); w3(0xa0); w2(0x24); buf[count-1] = r4();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static void epat_write_block( PIA *pi, char * buf, int count )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) { int ph, k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) switch (pi->mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) case 2: w0(0x67); w2(1); w2(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ph = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) for(k=0;k<count;k++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) w0(buf[k]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) w2(4+ph);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ph = 1 - ph;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) w2(7); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) case 3: w3(0xc0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) for(k=0;k<count;k++) w4(buf[k]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) case 4: w3(0xc0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) for(k=0;k<(count/2);k++) w4w(((u16 *)buf)[k]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) case 5: w3(0xc0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) for(k=0;k<(count/4);k++) w4l(((u32 *)buf)[k]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* these macros access the EPAT registers in native addressing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define WR(r,v) epat_write_regr(pi,2,r,v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define RR(r) (epat_read_regr(pi,2,r))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* and these access the IDE task file */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define WRi(r,v) epat_write_regr(pi,0,r,v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define RRi(r) (epat_read_regr(pi,0,r))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /* FIXME: the CPP stuff should be fixed to handle multiple EPATs on a chain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define CPP(x) w2(4);w0(0x22);w0(0xaa);w0(0x55);w0(0);w0(0xff);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) w0(0x87);w0(0x78);w0(x);w2(4);w2(5);w2(4);w0(0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static void epat_connect ( PIA *pi )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) { pi->saved_r0 = r0();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) pi->saved_r2 = r2();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* Initialize the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) CPP(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (epatc8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) CPP(0x40);CPP(0xe0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) w0(0);w2(1);w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) WR(0x8,0x12);WR(0xc,0x14);WR(0x12,0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) WR(0xe,0xf);WR(0xf,4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /* WR(0xe,0xa);WR(0xf,4); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) WR(0xe,0xd);WR(0xf,0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /* CPP(0x30); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* Connect to the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) CPP(0xe0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) w0(0);w2(1);w2(4); /* Idle into SPP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (pi->mode >= 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) w0(0);w2(1);w2(4);w2(0xc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* Request EPP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) w0(0x40);w2(6);w2(7);w2(4);w2(0xc);w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (!epatc8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) WR(8,0x10); WR(0xc,0x14); WR(0xa,0x38); WR(0x12,0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static void epat_disconnect (PIA *pi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) { CPP(0x30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) w0(pi->saved_r0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) w2(pi->saved_r2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static int epat_test_proto( PIA *pi, char * scratch, int verbose )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) { int k, j, f, cc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) int e[2] = {0,0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) epat_connect(pi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) cc = RR(0xd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) epat_disconnect(pi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) epat_connect(pi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) for (j=0;j<2;j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) WRi(6,0xa0+j*0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) for (k=0;k<256;k++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) WRi(2,k^0xaa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) WRi(3,k^0x55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (RRi(2) != (k^0xaa)) e[j]++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) epat_disconnect(pi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) f = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) epat_connect(pi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) WR(0x13,1); WR(0x13,0); WR(0xa,0x11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) epat_read_block(pi,scratch,512);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) for (k=0;k<256;k++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if ((scratch[2*k] & 0xff) != k) f++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if ((scratch[2*k+1] & 0xff) != (0xff-k)) f++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) epat_disconnect(pi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (verbose) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) printk("%s: epat: port 0x%x, mode %d, ccr %x, test=(%d,%d,%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) pi->device,pi->port,pi->mode,cc,e[0],e[1],f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return (e[0] && e[1]) || f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static void epat_log_adapter( PIA *pi, char * scratch, int verbose )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) { int ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) char *mode_string[6] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {"4-bit","5/3","8-bit","EPP-8","EPP-16","EPP-32"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) epat_connect(pi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) WR(0xa,0x38); /* read the version code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) ver = RR(0xb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) epat_disconnect(pi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) printk("%s: epat %s, Shuttle EPAT chip %x at 0x%x, ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) pi->device,EPAT_VERSION,ver,pi->port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) printk("mode %d (%s), delay %d\n",pi->mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) mode_string[pi->mode],pi->delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static struct pi_protocol epat = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .name = "epat",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .max_mode = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .epp_first = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .default_delay = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .max_units = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .write_regr = epat_write_regr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .read_regr = epat_read_regr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .write_block = epat_write_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .read_block = epat_read_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .connect = epat_connect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .disconnect = epat_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .test_proto = epat_test_proto,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .log_adapter = epat_log_adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static int __init epat_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #ifdef CONFIG_PARIDE_EPATC8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) epatc8 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return paride_register(&epat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static void __exit epat_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) paride_unregister(&epat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) module_init(epat_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) module_exit(epat_exit)