^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) comm.c (c) 1997-8 Grant R. Guenther <grant@torque.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Under the terms of the GNU General Public License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) comm.c is a low-level protocol driver for some older models
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) of the DataStor "Commuter" parallel to IDE adapter. Some of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) the parallel port devices marketed by Arista currently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) use this adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* Changes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 1.01 GRG 1998.05.05 init_proto, release_proto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define COMM_VERSION "1.01"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include "paride.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* mode codes: 0 nybble reads, 8-bit writes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 1 8-bit reads and writes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 2 8-bit EPP mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define j44(a,b) (((a>>3)&0x0f)|((b<<1)&0xf0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define P1 w2(5);w2(0xd);w2(0xd);w2(5);w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define P2 w2(5);w2(7);w2(7);w2(5);w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* cont = 0 - access the IDE register file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) cont = 1 - access the IDE command set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int cont_map[2] = { 0x08, 0x10 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int comm_read_regr( PIA *pi, int cont, int regr )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) { int l, h, r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) r = regr + cont_map[cont];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) switch (pi->mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) case 0: w0(r); P1; w0(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) w2(6); l = r1(); w0(0x80); h = r1(); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return j44(l,h);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) case 1: w0(r+0x20); P1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) w0(0); w2(0x26); h = r0(); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) return h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) case 4: w3(r+0x20); (void)r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) w2(0x24); h = r4(); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static void comm_write_regr( PIA *pi, int cont, int regr, int val )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) { int r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) r = regr + cont_map[cont];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) switch (pi->mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) case 1: w0(r); P1; w0(val); P2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) case 4: w3(r); (void)r1(); w4(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static void comm_connect ( PIA *pi )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) { pi->saved_r0 = r0();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) pi->saved_r2 = r2();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) w2(4); w0(0xff); w2(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) w2(4); w0(0xaa); w2(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) w2(4); w0(0x00); w2(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) w2(4); w0(0x87); w2(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) w2(4); w0(0xe0); w2(0xc); w2(0xc); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static void comm_disconnect ( PIA *pi )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) { w2(0); w2(0); w2(0); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) w0(pi->saved_r0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) w2(pi->saved_r2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static void comm_read_block( PIA *pi, char * buf, int count )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) { int i, l, h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) switch (pi->mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) case 0: w0(0x48); P1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) for(i=0;i<count;i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) w0(0); w2(6); l = r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) w0(0x80); h = r1(); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) buf[i] = j44(l,h);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) case 1: w0(0x68); P1; w0(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) for(i=0;i<count;i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) w2(0x26); buf[i] = r0(); w2(0x24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) case 2: w3(0x68); (void)r1(); w2(0x24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) for (i=0;i<count;i++) buf[i] = r4();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) case 3: w3(0x68); (void)r1(); w2(0x24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) for (i=0;i<count/2;i++) ((u16 *)buf)[i] = r4w();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) case 4: w3(0x68); (void)r1(); w2(0x24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) for (i=0;i<count/4;i++) ((u32 *)buf)[i] = r4l();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* NB: Watch out for the byte swapped writes ! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static void comm_write_block( PIA *pi, char * buf, int count )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) { int k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) switch (pi->mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) case 1: w0(0x68); P1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) for (k=0;k<count;k++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) w2(5); w0(buf[k^1]); w2(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) w2(5); w2(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) case 2: w3(0x48); (void)r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) for (k=0;k<count;k++) w4(buf[k^1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) case 3: w3(0x48); (void)r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) for (k=0;k<count/2;k++) w4w(pi_swab16(buf,k));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) case 4: w3(0x48); (void)r1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) for (k=0;k<count/4;k++) w4l(pi_swab32(buf,k));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static void comm_log_adapter( PIA *pi, char * scratch, int verbose )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) { char *mode_string[5] = {"4-bit","8-bit","EPP-8","EPP-16","EPP-32"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) printk("%s: comm %s, DataStor Commuter at 0x%x, ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) pi->device,COMM_VERSION,pi->port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) printk("mode %d (%s), delay %d\n",pi->mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) mode_string[pi->mode],pi->delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static struct pi_protocol comm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .name = "comm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .max_mode = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .epp_first = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .default_delay = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .max_units = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .write_regr = comm_write_regr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .read_regr = comm_read_regr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .write_block = comm_write_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .read_block = comm_read_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .connect = comm_connect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .disconnect = comm_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .log_adapter = comm_log_adapter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static int __init comm_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return paride_register(&comm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static void __exit comm_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) paride_unregister(&comm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) module_init(comm_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) module_exit(comm_exit)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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