^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Broadcom specific AMBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * SPROM reading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2011, 2012, Hauke Mehrtens <hauke@hauke-m.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Licensed under the GNU/GPL. See COPYING for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "bcma_private.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/bcma/bcma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/bcma/bcma_regs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static int(*get_fallback_sprom)(struct bcma_bus *dev, struct ssb_sprom *out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * bcma_arch_register_fallback_sprom - Registers a method providing a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * fallback SPROM if no SPROM is found.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * @sprom_callback: The callback function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * With this function the architecture implementation may register a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * callback handler which fills the SPROM data structure. The fallback is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * used for PCI based BCMA devices, where no valid SPROM can be found
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * in the shadow registers and to provide the SPROM for SoCs where BCMA is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * to controll the system bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * This function is useful for weird architectures that have a half-assed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * BCMA device hardwired to their PCI bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * This function is available for architecture code, only. So it is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * exported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int bcma_arch_register_fallback_sprom(int (*sprom_callback)(struct bcma_bus *bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct ssb_sprom *out))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (get_fallback_sprom)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return -EEXIST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) get_fallback_sprom = sprom_callback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static int bcma_fill_sprom_with_fallback(struct bcma_bus *bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct ssb_sprom *out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) if (!get_fallback_sprom) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) err = -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) err = get_fallback_sprom(bus, out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) bcma_debug(bus, "Using SPROM revision %d provided by platform.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) bus->sprom.revision);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) bcma_warn(bus, "Using fallback SPROM failed (err %d)\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /**************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * R/W ops.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) **************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static void bcma_sprom_read(struct bcma_bus *bus, u16 offset, u16 *sprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) size_t words)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) for (i = 0; i < words; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) sprom[i] = bcma_read16(bus->drv_cc.core, offset + (i * 2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /**************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * Validation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) **************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static inline u8 bcma_crc8(u8 crc, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* Polynomial: x^8 + x^7 + x^6 + x^4 + x^2 + 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static const u8 t[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 0x00, 0xF7, 0xB9, 0x4E, 0x25, 0xD2, 0x9C, 0x6B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 0x4A, 0xBD, 0xF3, 0x04, 0x6F, 0x98, 0xD6, 0x21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 0x94, 0x63, 0x2D, 0xDA, 0xB1, 0x46, 0x08, 0xFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 0xDE, 0x29, 0x67, 0x90, 0xFB, 0x0C, 0x42, 0xB5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) 0x7F, 0x88, 0xC6, 0x31, 0x5A, 0xAD, 0xE3, 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) 0x35, 0xC2, 0x8C, 0x7B, 0x10, 0xE7, 0xA9, 0x5E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) 0xEB, 0x1C, 0x52, 0xA5, 0xCE, 0x39, 0x77, 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) 0xA1, 0x56, 0x18, 0xEF, 0x84, 0x73, 0x3D, 0xCA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) 0xFE, 0x09, 0x47, 0xB0, 0xDB, 0x2C, 0x62, 0x95,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 0xB4, 0x43, 0x0D, 0xFA, 0x91, 0x66, 0x28, 0xDF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 0x6A, 0x9D, 0xD3, 0x24, 0x4F, 0xB8, 0xF6, 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 0x20, 0xD7, 0x99, 0x6E, 0x05, 0xF2, 0xBC, 0x4B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 0x81, 0x76, 0x38, 0xCF, 0xA4, 0x53, 0x1D, 0xEA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 0xCB, 0x3C, 0x72, 0x85, 0xEE, 0x19, 0x57, 0xA0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 0x15, 0xE2, 0xAC, 0x5B, 0x30, 0xC7, 0x89, 0x7E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 0x5F, 0xA8, 0xE6, 0x11, 0x7A, 0x8D, 0xC3, 0x34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 0xAB, 0x5C, 0x12, 0xE5, 0x8E, 0x79, 0x37, 0xC0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 0xE1, 0x16, 0x58, 0xAF, 0xC4, 0x33, 0x7D, 0x8A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 0x3F, 0xC8, 0x86, 0x71, 0x1A, 0xED, 0xA3, 0x54,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 0x75, 0x82, 0xCC, 0x3B, 0x50, 0xA7, 0xE9, 0x1E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 0xD4, 0x23, 0x6D, 0x9A, 0xF1, 0x06, 0x48, 0xBF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 0x9E, 0x69, 0x27, 0xD0, 0xBB, 0x4C, 0x02, 0xF5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 0x40, 0xB7, 0xF9, 0x0E, 0x65, 0x92, 0xDC, 0x2B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 0x0A, 0xFD, 0xB3, 0x44, 0x2F, 0xD8, 0x96, 0x61,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 0x55, 0xA2, 0xEC, 0x1B, 0x70, 0x87, 0xC9, 0x3E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 0x1F, 0xE8, 0xA6, 0x51, 0x3A, 0xCD, 0x83, 0x74,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 0xC1, 0x36, 0x78, 0x8F, 0xE4, 0x13, 0x5D, 0xAA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 0x8B, 0x7C, 0x32, 0xC5, 0xAE, 0x59, 0x17, 0xE0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 0x2A, 0xDD, 0x93, 0x64, 0x0F, 0xF8, 0xB6, 0x41,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 0x60, 0x97, 0xD9, 0x2E, 0x45, 0xB2, 0xFC, 0x0B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 0xBE, 0x49, 0x07, 0xF0, 0x9B, 0x6C, 0x22, 0xD5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return t[crc ^ data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static u8 bcma_sprom_crc(const u16 *sprom, size_t words)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u8 crc = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) for (word = 0; word < words - 1; word++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) crc = bcma_crc8(crc, sprom[word] & 0x00FF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) crc = bcma_crc8(crc, (sprom[word] & 0xFF00) >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) crc = bcma_crc8(crc, sprom[words - 1] & 0x00FF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) crc ^= 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static int bcma_sprom_check_crc(const u16 *sprom, size_t words)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) u8 crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) u8 expected_crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) u16 tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) crc = bcma_sprom_crc(sprom, words);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) tmp = sprom[words - 1] & SSB_SPROM_REVISION_CRC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) expected_crc = tmp >> SSB_SPROM_REVISION_CRC_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (crc != expected_crc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return -EPROTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static int bcma_sprom_valid(struct bcma_bus *bus, const u16 *sprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) size_t words)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) u16 revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) err = bcma_sprom_check_crc(sprom, words);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) revision = sprom[words - 1] & SSB_SPROM_REVISION_REV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (revision != 8 && revision != 9 && revision != 10) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) pr_err("Unsupported SPROM revision: %d\n", revision);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) bus->sprom.revision = revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) bcma_debug(bus, "Found SPROM revision %d\n", revision);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /**************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * SPROM extraction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) **************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define SPOFF(offset) ((offset) / sizeof(u16))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define SPEX(_field, _offset, _mask, _shift) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define SPEX32(_field, _offset, _mask, _shift) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) bus->sprom._field = ((((u32)sprom[SPOFF((_offset)+2)] << 16 | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) sprom[SPOFF(_offset)]) & (_mask)) >> (_shift))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) SPEX(_field[0], _offset + 0, _mask, _shift); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) SPEX(_field[1], _offset + 2, _mask, _shift); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) SPEX(_field[2], _offset + 4, _mask, _shift); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) SPEX(_field[3], _offset + 6, _mask, _shift); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) SPEX(_field[4], _offset + 8, _mask, _shift); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) SPEX(_field[5], _offset + 10, _mask, _shift); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) SPEX(_field[6], _offset + 12, _mask, _shift); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) SPEX(_field[7], _offset + 14, _mask, _shift); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static s8 sprom_extract_antgain(const u16 *in, u16 offset, u16 mask, u16 shift)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) u16 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) u8 gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) v = in[SPOFF(offset)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) gain = (v & mask) >> shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (gain == 0xFF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) gain = 8; /* If unset use 2dBm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /* Q5.2 Fractional part is stored in 0xC0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) return (s8)gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) u16 v, o;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static const u16 pwr_info_offset[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ARRAY_SIZE(bus->sprom.core_pwr_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) for (i = 0; i < 3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) v = sprom[SPOFF(SSB_SPROM8_IL0MAC) + i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) *(((__be16 *)bus->sprom.il0mac) + i) = cpu_to_be16(v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) SPEX(board_rev, SSB_SPROM8_BOARDREV, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) SPEX(board_type, SSB_SPROM1_SPID, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01, SSB_SPROM4_TXPID2G0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) SSB_SPROM4_TXPID2G0_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01, SSB_SPROM4_TXPID2G1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) SSB_SPROM4_TXPID2G1_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23, SSB_SPROM4_TXPID2G2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) SSB_SPROM4_TXPID2G2_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23, SSB_SPROM4_TXPID2G3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) SSB_SPROM4_TXPID2G3_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01, SSB_SPROM4_TXPID5GL0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) SSB_SPROM4_TXPID5GL0_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01, SSB_SPROM4_TXPID5GL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) SSB_SPROM4_TXPID5GL1_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23, SSB_SPROM4_TXPID5GL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) SSB_SPROM4_TXPID5GL2_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23, SSB_SPROM4_TXPID5GL3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) SSB_SPROM4_TXPID5GL3_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01, SSB_SPROM4_TXPID5G0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) SSB_SPROM4_TXPID5G0_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01, SSB_SPROM4_TXPID5G1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) SSB_SPROM4_TXPID5G1_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23, SSB_SPROM4_TXPID5G2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) SSB_SPROM4_TXPID5G2_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23, SSB_SPROM4_TXPID5G3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) SSB_SPROM4_TXPID5G3_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01, SSB_SPROM4_TXPID5GH0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) SSB_SPROM4_TXPID5GH0_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01, SSB_SPROM4_TXPID5GH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) SSB_SPROM4_TXPID5GH1_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23, SSB_SPROM4_TXPID5GH2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) SSB_SPROM4_TXPID5GH2_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23, SSB_SPROM4_TXPID5GH3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) SSB_SPROM4_TXPID5GH3_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) SPEX(boardflags_lo, SSB_SPROM8_BFLLO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) SPEX(boardflags_hi, SSB_SPROM8_BFLHI, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) /* Extract cores power info info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) o = pwr_info_offset[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) SSB_SPROM8_2G_MAXP, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) SSB_SPROM8_5G_MAXP, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) SSB_SPROM8_5GH_MAXP, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_TSSIPOS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) SSB_SROM8_FEM_TSSIPOS_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_EXTPA_GAIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_PDET_RANGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) SSB_SROM8_FEM_PDET_RANGE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_TR_ISO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) SSB_SROM8_FEM_TR_ISO_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_ANTSWLUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) SSB_SROM8_FEM_ANTSWLUT_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_TSSIPOS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) SSB_SROM8_FEM_TSSIPOS_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_EXTPA_GAIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_PDET_RANGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) SSB_SROM8_FEM_PDET_RANGE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_TR_ISO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) SSB_SROM8_FEM_TR_ISO_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_ANTSWLUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) SSB_SROM8_FEM_ANTSWLUT_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) SSB_SPROM8_ANTAVAIL_A_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) SSB_SPROM8_ANTAVAIL_BG_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) SSB_SPROM8_ITSSI_BG_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) SSB_SPROM8_ITSSI_A_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) SSB_SPROM8_MAXP_AL_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) SSB_SPROM8_GPIOA_P1_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) SSB_SPROM8_GPIOB_P3_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) SSB_SPROM8_TRI5G_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) SSB_SPROM8_TRI5GH_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) SSB_SPROM8_RXPO2G_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) SSB_SPROM8_RXPO5G_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) SSB_SPROM8_RSSISMC2G_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) SSB_SPROM8_RSSISAV2G_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) SSB_SPROM8_BXA2G_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) SSB_SPROM8_RSSISMC5G_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) SSB_SPROM8_RSSISAV5G_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) SSB_SPROM8_BXA5G_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) SPEX(pa0b0, SSB_SPROM8_PA0B0, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) SPEX(pa0b1, SSB_SPROM8_PA0B1, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) SPEX(pa0b2, SSB_SPROM8_PA0B2, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) SPEX(pa1b0, SSB_SPROM8_PA1B0, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) SPEX(pa1b1, SSB_SPROM8_PA1B1, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) SPEX(pa1b2, SSB_SPROM8_PA1B2, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) /* Extract the antenna gain values. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) bus->sprom.antenna_gain.a0 = sprom_extract_antgain(sprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) SSB_SPROM8_AGAIN01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) SSB_SPROM8_AGAIN0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) SSB_SPROM8_AGAIN0_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) bus->sprom.antenna_gain.a1 = sprom_extract_antgain(sprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) SSB_SPROM8_AGAIN01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) SSB_SPROM8_AGAIN1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) SSB_SPROM8_AGAIN1_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) bus->sprom.antenna_gain.a2 = sprom_extract_antgain(sprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) SSB_SPROM8_AGAIN23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) SSB_SPROM8_AGAIN2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) SSB_SPROM8_AGAIN2_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) bus->sprom.antenna_gain.a3 = sprom_extract_antgain(sprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) SSB_SPROM8_AGAIN23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) SSB_SPROM8_AGAIN3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) SSB_SPROM8_AGAIN3_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) SSB_SPROM8_LEDDC_ON_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) SSB_SPROM8_LEDDC_OFF_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) SSB_SPROM8_TXRXC_SWITCH_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) SSB_SPROM8_THERMAL_TRESH_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) SSB_SPROM8_THERMAL_OFFSET_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) SSB_SPROM8_TEMPDELTA_PHYCAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) SSB_SPROM8_TEMPDELTA_HYSTERESIS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) * Indicates the presence of external SPROM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static bool bcma_sprom_ext_available(struct bcma_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) u32 chip_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) u32 srom_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) u32 present_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (bus->drv_cc.core->id.rev >= 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if (!(bus->drv_cc.capabilities & BCMA_CC_CAP_SPROM))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) srom_control = bcma_read32(bus->drv_cc.core,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) BCMA_CC_SROM_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return srom_control & BCMA_CC_SROM_CONTROL_PRESENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) /* older chipcommon revisions use chip status register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) chip_status = bcma_read32(bus->drv_cc.core, BCMA_CC_CHIPSTAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) switch (bus->chipinfo.id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) case BCMA_CHIP_ID_BCM4313:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) present_mask = BCMA_CC_CHIPST_4313_SPROM_PRESENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) case BCMA_CHIP_ID_BCM4331:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) present_mask = BCMA_CC_CHIPST_4331_SPROM_PRESENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) return chip_status & present_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) * Indicates that on-chip OTP memory is present and enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) static bool bcma_sprom_onchip_available(struct bcma_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) u32 chip_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) u32 otpsize = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) bool present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) chip_status = bcma_read32(bus->drv_cc.core, BCMA_CC_CHIPSTAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) switch (bus->chipinfo.id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) case BCMA_CHIP_ID_BCM4313:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) present = chip_status & BCMA_CC_CHIPST_4313_OTP_PRESENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) case BCMA_CHIP_ID_BCM4331:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) present = chip_status & BCMA_CC_CHIPST_4331_OTP_PRESENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) case BCMA_CHIP_ID_BCM43142:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) case BCMA_CHIP_ID_BCM43224:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) case BCMA_CHIP_ID_BCM43225:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) /* for these chips OTP is always available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) present = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) case BCMA_CHIP_ID_BCM43131:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) case BCMA_CHIP_ID_BCM43217:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) case BCMA_CHIP_ID_BCM43227:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) case BCMA_CHIP_ID_BCM43228:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) case BCMA_CHIP_ID_BCM43428:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) present = chip_status & BCMA_CC_CHIPST_43228_OTP_PRESENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) present = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (present) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) otpsize = bus->drv_cc.capabilities & BCMA_CC_CAP_OTPS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) otpsize >>= BCMA_CC_CAP_OTPS_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) return otpsize != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * Verify OTP is filled and determine the byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * offset where SPROM data is located.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * On error, returns 0; byte offset otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) static int bcma_sprom_onchip_offset(struct bcma_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) struct bcma_device *cc = bus->drv_cc.core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) u32 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) /* verify OTP status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if ((bcma_read32(cc, BCMA_CC_OTPS) & BCMA_CC_OTPS_GU_PROG_HW) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) /* obtain bit offset from otplayout register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) offset = (bcma_read32(cc, BCMA_CC_OTPL) & BCMA_CC_OTPL_GURGN_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) return BCMA_CC_SPROM + (offset >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) int bcma_sprom_get(struct bcma_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) u16 offset = BCMA_CC_SPROM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) u16 *sprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static const size_t sprom_sizes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) SSB_SPROMSIZE_WORDS_R4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) SSB_SPROMSIZE_WORDS_R10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) SSB_SPROMSIZE_WORDS_R11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) int i, err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (!bus->drv_cc.core)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) if (!bcma_sprom_ext_available(bus)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) bool sprom_onchip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) * External SPROM takes precedence so check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) * on-chip OTP only when no external SPROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) * is present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) sprom_onchip = bcma_sprom_onchip_available(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (sprom_onchip) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) /* determine offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) offset = bcma_sprom_onchip_offset(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) if (!offset || !sprom_onchip) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) * Maybe there is no SPROM on the device?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) * Now we ask the arch code if there is some sprom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) * available for this device in some other storage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) err = bcma_fill_sprom_with_fallback(bus, &bus->sprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4331 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) bus->chipinfo.id == BCMA_CHIP_ID_BCM43431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) bcma_debug(bus, "SPROM offset 0x%x\n", offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) for (i = 0; i < ARRAY_SIZE(sprom_sizes); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) size_t words = sprom_sizes[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) sprom = kcalloc(words, sizeof(u16), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) if (!sprom)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) bcma_sprom_read(bus, offset, sprom, words);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) err = bcma_sprom_valid(bus, sprom, words);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (!err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) kfree(sprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4331 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) bus->chipinfo.id == BCMA_CHIP_ID_BCM43431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) bcma_warn(bus, "Invalid SPROM read from the PCIe card, trying to use fallback SPROM\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) err = bcma_fill_sprom_with_fallback(bus, &bus->sprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) bcma_sprom_extract_r8(bus, sprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) kfree(sprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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