Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * Broadcom specific AMBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * ChipCommon NAND flash interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Licensed under the GNU/GPL. See COPYING for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include "bcma_private.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/bcma/bcma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) struct platform_device bcma_nflash_dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	.name		= "bcma_nflash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	.num_resources	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* Initialize NAND flash access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) int bcma_nflash_init(struct bcma_drv_cc *cc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	struct bcma_bus *bus = cc->core->bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	if (bus->chipinfo.id != BCMA_CHIP_ID_BCM4706 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	    cc->core->id.rev != 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		bcma_err(bus, "NAND flash on unsupported board!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	if (!(cc->capabilities & BCMA_CC_CAP_NFLASH)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		bcma_err(bus, "NAND flash not present according to ChipCommon\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	cc->nflash.present = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	if (cc->core->id.rev == 38 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	    (cc->status & BCMA_CC_CHIPST_5357_NAND_BOOT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		cc->nflash.boot = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	/* Prepare platform device, but don't register it yet. It's too early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	 * malloc (required by device_private_init) is not available yet. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	bcma_nflash_dev.dev.platform_data = &cc->nflash;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }