Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) // Copyright(c) 2015-17 Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #include <linux/soundwire/sdw.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include "internal.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) static int regmap_sdw_write(void *context, unsigned int reg, unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 	struct device *dev = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	struct sdw_slave *slave = dev_to_sdw_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	return sdw_write_no_pm(slave, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static int regmap_sdw_read(void *context, unsigned int reg, unsigned int *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	struct device *dev = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	struct sdw_slave *slave = dev_to_sdw_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	int read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	read = sdw_read_no_pm(slave, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	if (read < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		return read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	*val = read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static struct regmap_bus regmap_sdw = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	.reg_read = regmap_sdw_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	.reg_write = regmap_sdw_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	.reg_format_endian_default = REGMAP_ENDIAN_LITTLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	.val_format_endian_default = REGMAP_ENDIAN_LITTLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static int regmap_sdw_config_check(const struct regmap_config *config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	/* All register are 8-bits wide as per MIPI Soundwire 1.0 Spec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	if (config->val_bits != 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	/* Registers are 32 bits wide */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	if (config->reg_bits != 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	if (config->pad_bits != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct regmap *__regmap_init_sdw(struct sdw_slave *sdw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 				 const struct regmap_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 				 struct lock_class_key *lock_key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 				 const char *lock_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	ret = regmap_sdw_config_check(config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 		return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	return __regmap_init(&sdw->dev, &regmap_sdw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 			&sdw->dev, config, lock_key, lock_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) EXPORT_SYMBOL_GPL(__regmap_init_sdw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 				      const struct regmap_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 				      struct lock_class_key *lock_key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 				      const char *lock_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	ret = regmap_sdw_config_check(config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 		return ERR_PTR(ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 	return __devm_regmap_init(&sdw->dev, &regmap_sdw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 			&sdw->dev, config, lock_key, lock_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) EXPORT_SYMBOL_GPL(__devm_regmap_init_sdw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) MODULE_DESCRIPTION("Regmap SoundWire Module");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) MODULE_LICENSE("GPL v2");