Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * MSI framework for platform devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2015 ARM Limited, All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author: Marc Zyngier <marc.zyngier@arm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/idr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/msi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define DEV_ID_SHIFT	21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define MAX_DEV_MSIS	(1 << (32 - DEV_ID_SHIFT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * Internal data structure containing a (made up, but unique) devid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * and the callback to write the MSI message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) struct platform_msi_priv_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	struct device		*dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	void 			*host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	msi_alloc_info_t	arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	irq_write_msi_msg_t	write_msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	int			devid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) /* The devid allocator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) static DEFINE_IDA(platform_msi_devid_ida);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #ifdef GENERIC_MSI_DOMAIN_OPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  * Convert an msi_desc to a globaly unique identifier (per-device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * devid + msi_desc position in the msi_list).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) static irq_hw_number_t platform_msi_calc_hwirq(struct msi_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	u32 devid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	devid = desc->platform.msi_priv_data->devid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	return (devid << (32 - DEV_ID_SHIFT)) | desc->platform.msi_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static void platform_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	arg->desc = desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	arg->hwirq = platform_msi_calc_hwirq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static int platform_msi_init(struct irq_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 			     struct msi_domain_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 			     unsigned int virq, irq_hw_number_t hwirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 			     msi_alloc_info_t *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	return irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 					     info->chip, info->chip_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define platform_msi_set_desc		NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define platform_msi_init		NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) static void platform_msi_update_dom_ops(struct msi_domain_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct msi_domain_ops *ops = info->ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	BUG_ON(!ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	if (ops->msi_init == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		ops->msi_init = platform_msi_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	if (ops->set_desc == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		ops->set_desc = platform_msi_set_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static void platform_msi_write_msg(struct irq_data *data, struct msi_msg *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	struct msi_desc *desc = irq_data_get_msi_desc(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	struct platform_msi_priv_data *priv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	priv_data = desc->platform.msi_priv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	priv_data->write_msg(desc, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static void platform_msi_update_chip_ops(struct msi_domain_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct irq_chip *chip = info->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	BUG_ON(!chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	if (!chip->irq_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		chip->irq_mask = irq_chip_mask_parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	if (!chip->irq_unmask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		chip->irq_unmask = irq_chip_unmask_parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	if (!chip->irq_eoi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		chip->irq_eoi = irq_chip_eoi_parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	if (!chip->irq_set_affinity)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		chip->irq_set_affinity = msi_domain_set_affinity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	if (!chip->irq_write_msi_msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		chip->irq_write_msi_msg = platform_msi_write_msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	if (WARN_ON((info->flags & MSI_FLAG_LEVEL_CAPABLE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		    !(chip->flags & IRQCHIP_SUPPORTS_LEVEL_MSI)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		info->flags &= ~MSI_FLAG_LEVEL_CAPABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static void platform_msi_free_descs(struct device *dev, int base, int nvec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	struct msi_desc *desc, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	list_for_each_entry_safe(desc, tmp, dev_to_msi_list(dev), list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		if (desc->platform.msi_index >= base &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		    desc->platform.msi_index < (base + nvec)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 			list_del(&desc->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			free_msi_entry(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int platform_msi_alloc_descs_with_irq(struct device *dev, int virq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 					     int nvec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 					     struct platform_msi_priv_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	struct msi_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	int i, base = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	if (!list_empty(dev_to_msi_list(dev))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		desc = list_last_entry(dev_to_msi_list(dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 				       struct msi_desc, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		base = desc->platform.msi_index + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	for (i = 0; i < nvec; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		desc = alloc_msi_entry(dev, 1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		desc->platform.msi_priv_data = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		desc->platform.msi_index = base + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		desc->irq = virq ? virq + i : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		list_add_tail(&desc->list, dev_to_msi_list(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	if (i != nvec) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		/* Clean up the mess */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		platform_msi_free_descs(dev, base, nvec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static int platform_msi_alloc_descs(struct device *dev, int nvec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 				    struct platform_msi_priv_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	return platform_msi_alloc_descs_with_irq(dev, 0, nvec, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)  * platform_msi_create_irq_domain - Create a platform MSI interrupt domain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)  * @fwnode:		Optional fwnode of the interrupt controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)  * @info:	MSI domain info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)  * @parent:	Parent irq domain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)  * Updates the domain and chip ops and creates a platform MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)  * interrupt domain.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)  * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)  * A domain pointer or NULL in case of failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 						  struct msi_domain_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 						  struct irq_domain *parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	struct irq_domain *domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		platform_msi_update_dom_ops(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		platform_msi_update_chip_ops(info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	domain = msi_create_irq_domain(fwnode, info, parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	if (domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		irq_domain_update_bus_token(domain, DOMAIN_BUS_PLATFORM_MSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	return domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static struct platform_msi_priv_data *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) platform_msi_alloc_priv_data(struct device *dev, unsigned int nvec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 			     irq_write_msi_msg_t write_msi_msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	struct platform_msi_priv_data *datap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	 * Limit the number of interrupts to 2048 per device. Should we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	 * need to bump this up, DEV_ID_SHIFT should be adjusted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	 * accordingly (which would impact the max number of MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	 * capable devices).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	if (!dev->msi_domain || !write_msi_msg || !nvec || nvec > MAX_DEV_MSIS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	if (dev->msi_domain->bus_token != DOMAIN_BUS_PLATFORM_MSI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		dev_err(dev, "Incompatible msi_domain, giving up\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	/* Already had a helping of MSI? Greed... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (!list_empty(dev_to_msi_list(dev)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		return ERR_PTR(-EBUSY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	datap = kzalloc(sizeof(*datap), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	if (!datap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	datap->devid = ida_simple_get(&platform_msi_devid_ida,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 				      0, 1 << DEV_ID_SHIFT, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	if (datap->devid < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		int err = datap->devid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		kfree(datap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		return ERR_PTR(err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	datap->write_msg = write_msi_msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	datap->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	return datap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static void platform_msi_free_priv_data(struct platform_msi_priv_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	ida_simple_remove(&platform_msi_devid_ida, data->devid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	kfree(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)  * platform_msi_domain_alloc_irqs - Allocate MSI interrupts for @dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)  * @dev:		The device for which to allocate interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)  * @nvec:		The number of interrupts to allocate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)  * @write_msi_msg:	Callback to write an interrupt message for @dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)  * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)  * Zero for success, or an error code in case of failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 				   irq_write_msi_msg_t write_msi_msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	struct platform_msi_priv_data *priv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	priv_data = platform_msi_alloc_priv_data(dev, nvec, write_msi_msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	if (IS_ERR(priv_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		return PTR_ERR(priv_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	err = platform_msi_alloc_descs(dev, nvec, priv_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		goto out_free_priv_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	err = msi_domain_alloc_irqs(dev->msi_domain, dev, nvec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		goto out_free_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) out_free_desc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	platform_msi_free_descs(dev, 0, nvec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) out_free_priv_data:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	platform_msi_free_priv_data(priv_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) EXPORT_SYMBOL_GPL(platform_msi_domain_alloc_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)  * platform_msi_domain_free_irqs - Free MSI interrupts for @dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)  * @dev:	The device for which to free interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) void platform_msi_domain_free_irqs(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	if (!list_empty(dev_to_msi_list(dev))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		struct msi_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		desc = first_msi_entry(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		platform_msi_free_priv_data(desc->platform.msi_priv_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	msi_domain_free_irqs(dev->msi_domain, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	platform_msi_free_descs(dev, 0, MAX_DEV_MSIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) EXPORT_SYMBOL_GPL(platform_msi_domain_free_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)  * platform_msi_get_host_data - Query the private data associated with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)  *                              a platform-msi domain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)  * @domain:	The platform-msi domain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)  * Returns the private data provided when calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)  * platform_msi_create_device_domain.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) void *platform_msi_get_host_data(struct irq_domain *domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	struct platform_msi_priv_data *data = domain->host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	return data->host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)  * platform_msi_create_device_domain - Create a platform-msi domain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)  * @dev:		The device generating the MSIs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)  * @nvec:		The number of MSIs that need to be allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)  * @write_msi_msg:	Callback to write an interrupt message for @dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)  * @ops:		The hierarchy domain operations to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)  * @host_data:		Private data associated to this domain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)  * Returns an irqdomain for @nvec interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) struct irq_domain *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) __platform_msi_create_device_domain(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 				    unsigned int nvec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 				    bool is_tree,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 				    irq_write_msi_msg_t write_msi_msg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 				    const struct irq_domain_ops *ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 				    void *host_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	struct platform_msi_priv_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	struct irq_domain *domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	data = platform_msi_alloc_priv_data(dev, nvec, write_msi_msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	if (IS_ERR(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	data->host_data = host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	domain = irq_domain_create_hierarchy(dev->msi_domain, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 					     is_tree ? 0 : nvec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 					     dev->fwnode, ops, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	if (!domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 		goto free_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	err = msi_domain_prepare_irqs(domain->parent, dev, nvec, &data->arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		goto free_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	return domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) free_domain:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	irq_domain_remove(domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) free_priv:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	platform_msi_free_priv_data(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)  * platform_msi_domain_free - Free interrupts associated with a platform-msi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)  *                            domain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)  * @domain:	The platform-msi domain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)  * @virq:	The base irq from which to perform the free operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)  * @nvec:	How many interrupts to free from @virq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 			      unsigned int nvec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	struct platform_msi_priv_data *data = domain->host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	struct msi_desc *desc, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	for_each_msi_entry_safe(desc, tmp, data->dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		if (WARN_ON(!desc->irq || desc->nvec_used != 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 		if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 		irq_domain_free_irqs_common(domain, desc->irq, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 		list_del(&desc->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		free_msi_entry(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)  * platform_msi_domain_alloc - Allocate interrupts associated with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)  *			       a platform-msi domain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)  * @domain:	The platform-msi domain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)  * @virq:	The base irq from which to perform the allocate operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)  * @nr_irqs:	How many interrupts to free from @virq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)  * Return 0 on success, or an error code on failure. Must be called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)  * with irq_domain_mutex held (which can only be done as part of a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)  * top-level interrupt allocation).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 			      unsigned int nr_irqs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	struct platform_msi_priv_data *data = domain->host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	err = platform_msi_alloc_descs_with_irq(data->dev, virq, nr_irqs, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	err = msi_domain_populate_irqs(domain->parent, data->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 				       virq, nr_irqs, &data->arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 		platform_msi_domain_free(domain, virq, nr_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }