^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* drivers/atm/uPD98402.c - NEC uPD98402 (PHY) declarations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/atmdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/sonet.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/atomic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "uPD98402.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define DPRINTK(format,args...) printk(KERN_DEBUG format,##args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DPRINTK(format,args...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct uPD98402_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct k_sonet_stats sonet_stats;/* link diagnostics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) unsigned char framing; /* SONET/SDH framing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int loop_mode; /* loopback mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PRIV(dev) ((struct uPD98402_priv *) dev->phy_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define PUT(val,reg) dev->ops->phy_put(dev,val,uPD98402_##reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define GET(reg) dev->ops->phy_get(dev,uPD98402_##reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static int fetch_stats(struct atm_dev *dev,struct sonet_stats __user *arg,int zero)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct sonet_stats tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) atomic_add(GET(HECCT),&PRIV(dev)->sonet_stats.uncorr_hcs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) sonet_copy_stats(&PRIV(dev)->sonet_stats,&tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (arg) error = copy_to_user(arg,&tmp,sizeof(tmp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (zero && !error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* unused fields are reported as -1, but we must not "adjust"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) them */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) tmp.corr_hcs = tmp.tx_cells = tmp.rx_cells = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) sonet_subtract_stats(&PRIV(dev)->sonet_stats,&tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return error ? -EFAULT : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int set_framing(struct atm_dev *dev,unsigned char framing)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static const unsigned char sonet[] = { 1,2,3,0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static const unsigned char sdh[] = { 1,0,0,2 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) const char *set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) switch (framing) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) case SONET_FRAME_SONET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) set = sonet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) case SONET_FRAME_SDH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) set = sdh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) spin_lock_irqsave(&PRIV(dev)->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) PUT(set[0],C11T);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) PUT(set[1],C12T);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) PUT(set[2],C13T);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) PUT((GET(MDR) & ~uPD98402_MDR_SS_MASK) | (set[3] <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) uPD98402_MDR_SS_SHIFT),MDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) spin_unlock_irqrestore(&PRIV(dev)->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static int get_sense(struct atm_dev *dev,u8 __user *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned char s[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) spin_lock_irqsave(&PRIV(dev)->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) s[0] = GET(C11R);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) s[1] = GET(C12R);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) s[2] = GET(C13R);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) spin_unlock_irqrestore(&PRIV(dev)->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return (put_user(s[0], arg) || put_user(s[1], arg+1) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) put_user(s[2], arg+2) || put_user(0xff, arg+3) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) put_user(0xff, arg+4) || put_user(0xff, arg+5)) ? -EFAULT : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int set_loopback(struct atm_dev *dev,int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) unsigned char mode_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) mode_reg = GET(MDR) & ~(uPD98402_MDR_TPLP | uPD98402_MDR_ALP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) uPD98402_MDR_RPLP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) switch (__ATM_LM_XTLOC(mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) case __ATM_LM_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) case __ATM_LM_PHY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) mode_reg |= uPD98402_MDR_TPLP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) case __ATM_LM_ATM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) mode_reg |= uPD98402_MDR_ALP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) switch (__ATM_LM_XTRMT(mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) case __ATM_LM_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) case __ATM_LM_PHY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) mode_reg |= uPD98402_MDR_RPLP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) PUT(mode_reg,MDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) PRIV(dev)->loop_mode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static int uPD98402_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) case SONET_GETSTATZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) case SONET_GETSTAT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) return fetch_stats(dev,arg, cmd == SONET_GETSTATZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) case SONET_SETFRAMING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return set_framing(dev, (int)(unsigned long)arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) case SONET_GETFRAMING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return put_user(PRIV(dev)->framing,(int __user *)arg) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) -EFAULT : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) case SONET_GETFRSENSE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return get_sense(dev,arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) case ATM_SETLOOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return set_loopback(dev, (int)(unsigned long)arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) case ATM_GETLOOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return put_user(PRIV(dev)->loop_mode,(int __user *)arg) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) -EFAULT : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) case ATM_QUERYLOOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return put_user(ATM_LM_LOC_PHY | ATM_LM_LOC_ATM |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) ATM_LM_RMT_PHY,(int __user *)arg) ? -EFAULT : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return -ENOIOCTLCMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define ADD_LIMITED(s,v) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) { atomic_add(GET(v),&PRIV(dev)->sonet_stats.s); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (atomic_read(&PRIV(dev)->sonet_stats.s) < 0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) atomic_set(&PRIV(dev)->sonet_stats.s,INT_MAX); }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static void stat_event(struct atm_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) unsigned char events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) events = GET(PCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (events & uPD98402_PFM_PFEB) ADD_LIMITED(path_febe,PFECB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (events & uPD98402_PFM_LFEB) ADD_LIMITED(line_febe,LECCT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (events & uPD98402_PFM_B3E) ADD_LIMITED(path_bip,B3ECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (events & uPD98402_PFM_B2E) ADD_LIMITED(line_bip,B2ECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (events & uPD98402_PFM_B1E) ADD_LIMITED(section_bip,B1ECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #undef ADD_LIMITED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static void uPD98402_int(struct atm_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static unsigned long silence = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) unsigned char reason;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) while ((reason = GET(PICR))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (reason & uPD98402_INT_LOS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) printk(KERN_NOTICE "%s(itf %d): signal lost\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) dev->type,dev->number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (reason & uPD98402_INT_PFM) stat_event(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (reason & uPD98402_INT_PCO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) (void) GET(PCOCR); /* clear interrupt cause */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) atomic_add(GET(HECCT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) &PRIV(dev)->sonet_stats.uncorr_hcs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if ((reason & uPD98402_INT_RFO) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) (time_after(jiffies, silence) || silence == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) printk(KERN_WARNING "%s(itf %d): uPD98402 receive "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) "FIFO overflow\n",dev->type,dev->number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) silence = (jiffies+HZ/2)|1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static int uPD98402_start(struct atm_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) DPRINTK("phy_start\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (!(dev->phy_data = kmalloc(sizeof(struct uPD98402_priv),GFP_KERNEL)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) spin_lock_init(&PRIV(dev)->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) memset(&PRIV(dev)->sonet_stats,0,sizeof(struct k_sonet_stats));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) (void) GET(PCR); /* clear performance events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) PUT(uPD98402_PFM_FJ,PCMR); /* ignore frequency adj */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) (void) GET(PCOCR); /* clear overflows */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) PUT(~uPD98402_PCO_HECC,PCOMR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) (void) GET(PICR); /* clear interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) PUT(~(uPD98402_INT_PFM | uPD98402_INT_ALM | uPD98402_INT_RFO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) uPD98402_INT_LOS),PIMR); /* enable them */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) (void) fetch_stats(dev,NULL,1); /* clear kernel counters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) atomic_set(&PRIV(dev)->sonet_stats.corr_hcs,-1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) atomic_set(&PRIV(dev)->sonet_stats.tx_cells,-1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) atomic_set(&PRIV(dev)->sonet_stats.rx_cells,-1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static int uPD98402_stop(struct atm_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /* let SAR driver worry about stopping interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) kfree(PRIV(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static const struct atmphy_ops uPD98402_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .start = uPD98402_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .ioctl = uPD98402_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .interrupt = uPD98402_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .stop = uPD98402_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) int uPD98402_init(struct atm_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) DPRINTK("phy_init\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) dev->phy = &uPD98402_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) EXPORT_SYMBOL(uPD98402_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static __init int uPD98402_module_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) module_init(uPD98402_module_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* module_exit not defined so not unloadable */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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