^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * pata_ns87410.c - National Semiconductor 87410 PATA for new ATA layer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * (C) 2006 Red Hat Inc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/libata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define DRV_NAME "pata_ns87410"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define DRV_VERSION "0.4.6"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * ns87410_pre_reset - probe begin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * @link: ATA link
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * @deadline: deadline jiffies for the operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Check enabled ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static int ns87410_pre_reset(struct ata_link *link, unsigned long deadline)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct ata_port *ap = link->ap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct pci_dev *pdev = to_pci_dev(ap->host->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static const struct pci_bits ns87410_enable_bits[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) { 0x43, 1, 0x08, 0x08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) { 0x47, 1, 0x08, 0x08 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) if (!pci_test_config_bits(pdev, &ns87410_enable_bits[ap->port_no]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return ata_sff_prereset(link, deadline);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * ns87410_set_piomode - set initial PIO mode data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * @ap: ATA interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * @adev: ATA device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * Program timing data. This is kept per channel not per device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * and only affects the data port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static void ns87410_set_piomode(struct ata_port *ap, struct ata_device *adev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct pci_dev *pdev = to_pci_dev(ap->host->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int port = 0x40 + 4 * ap->port_no;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u8 idetcr, idefr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct ata_timing at;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static const u8 activebits[15] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 0, 1, 2, 3, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 5, 5, 6, 6, 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 6, 7, 7, 7, 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static const u8 recoverbits[12] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 0, 1, 2, 3, 4, 5, 6, 6, 7, 7, 7, 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) pci_read_config_byte(pdev, port + 3, &idefr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (ata_pio_need_iordy(adev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) idefr |= 0x04; /* IORDY enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) idefr &= ~0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (ata_timing_compute(adev, adev->pio_mode, &at, 30303, 1) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) dev_err(&pdev->dev, "unknown mode %d\n", adev->pio_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) at.active = clamp_val(at.active, 2, 16) - 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) at.setup = clamp_val(at.setup, 1, 4) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) at.recover = clamp_val(at.recover, 1, 12) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) idetcr = (at.setup << 6) | (recoverbits[at.recover] << 3) | activebits[at.active];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) pci_write_config_byte(pdev, port, idetcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) pci_write_config_byte(pdev, port + 3, idefr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* We use ap->private_data as a pointer to the device currently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) loaded for timing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ap->private_data = adev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * ns87410_qc_issue - command issue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * @qc: command pending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * Called when the libata layer is about to issue a command. We wrap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * this interface so that we can load the correct ATA timings if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static unsigned int ns87410_qc_issue(struct ata_queued_cmd *qc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct ata_port *ap = qc->ap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct ata_device *adev = qc->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* If modes have been configured and the channel data is not loaded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) then load it. We have to check if pio_mode is set as the core code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) does not set adev->pio_mode to XFER_PIO_0 while probing as would be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) logical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (adev->pio_mode && adev != ap->private_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ns87410_set_piomode(ap, adev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return ata_sff_qc_issue(qc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static struct scsi_host_template ns87410_sht = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ATA_PIO_SHT(DRV_NAME),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static struct ata_port_operations ns87410_port_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .inherits = &ata_sff_port_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .qc_issue = ns87410_qc_issue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .cable_detect = ata_cable_40wire,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .set_piomode = ns87410_set_piomode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .prereset = ns87410_pre_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static int ns87410_init_one(struct pci_dev *dev, const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static const struct ata_port_info info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .flags = ATA_FLAG_SLAVE_POSS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .pio_mask = ATA_PIO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .port_ops = &ns87410_port_ops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) const struct ata_port_info *ppi[] = { &info, NULL };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return ata_pci_sff_init_one(dev, ppi, &ns87410_sht, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static const struct pci_device_id ns87410[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87410), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static struct pci_driver ns87410_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .id_table = ns87410,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .probe = ns87410_init_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .remove = ata_pci_remove_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .suspend = ata_pci_device_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .resume = ata_pci_device_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) module_pci_driver(ns87410_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MODULE_AUTHOR("Alan Cox");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) MODULE_DESCRIPTION("low-level driver for Nat Semi 87410");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) MODULE_DEVICE_TABLE(pci, ns87410);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) MODULE_VERSION(DRV_VERSION);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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