Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *	Marvell PATA driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *	For the moment we drive the PATA port in legacy mode. That
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *	isn't making full use of the device functionality but it is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *	easy to get working.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *	(c) 2006 Red Hat
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/libata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/ata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define DRV_NAME	"pata_marvell"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define DRV_VERSION	"0.1.6"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  *	marvell_pata_active	-	check if PATA is active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  *	@pdev: PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  *	Returns 1 if the PATA port may be active. We know how to check this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  *	for the 6145 but not the other devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) static int marvell_pata_active(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	u32 devices;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	void __iomem *barp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	/* We don't yet know how to do this for other devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	if (pdev->device != 0x6145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	barp = pci_iomap(pdev, 5, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	if (barp == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	printk("BAR5:");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	for(i = 0; i <= 0x0F; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		printk("%02X:%02X ", i, ioread8(barp + i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	devices = ioread32(barp + 0x0C);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	pci_iounmap(pdev, barp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	if (devices & 0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  *	marvell_pre_reset	-	probe begin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  *	@link: link
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  *	@deadline: deadline jiffies for the operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  *	Perform the PATA port setup we need.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) static int marvell_pre_reset(struct ata_link *link, unsigned long deadline)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	struct ata_port *ap = link->ap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	if (pdev->device == 0x6145 && ap->port_no == 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		!marvell_pata_active(pdev))	/* PATA enable ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 			return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	return ata_sff_prereset(link, deadline);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) static int marvell_cable_detect(struct ata_port *ap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	/* Cable type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	switch(ap->port_no)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		if (ioread8(ap->ioaddr.bmdma_addr + 1) & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 			return ATA_CBL_PATA40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		return ATA_CBL_PATA80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	case 1: /* Legacy SATA port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		return ATA_CBL_SATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	return 0;	/* Our BUG macro needs the right markup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) /* No PIO or DMA methods needed for this device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static struct scsi_host_template marvell_sht = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	ATA_BMDMA_SHT(DRV_NAME),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static struct ata_port_operations marvell_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	.inherits		= &ata_bmdma_port_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	.cable_detect		= marvell_cable_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	.prereset		= marvell_pre_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)  *	marvell_init_one - Register Marvell ATA PCI device with kernel services
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  *	@pdev: PCI device to register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  *	@ent: Entry in marvell_pci_tbl matching with @pdev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)  *	Called from kernel PCI layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)  *	LOCKING:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)  *	Inherited from PCI layer (may sleep).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)  *	RETURNS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)  *	Zero on success, or -ERRNO value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	static const struct ata_port_info info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		.flags		= ATA_FLAG_SLAVE_POSS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		.pio_mask	= ATA_PIO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		.mwdma_mask	= ATA_MWDMA2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		.udma_mask 	= ATA_UDMA5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		.port_ops	= &marvell_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	static const struct ata_port_info info_sata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		/* Slave possible as its magically mapped not real */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		.flags		= ATA_FLAG_SLAVE_POSS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		.pio_mask	= ATA_PIO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		.mwdma_mask	= ATA_MWDMA2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		.udma_mask 	= ATA_UDMA6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		.port_ops	= &marvell_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	const struct ata_port_info *ppi[] = { &info, &info_sata };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (pdev->device == 0x6101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		ppi[1] = &ata_dummy_port_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #if IS_ENABLED(CONFIG_SATA_AHCI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	if (!marvell_pata_active(pdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		printk(KERN_INFO DRV_NAME ": PATA port not active, deferring to AHCI driver.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	return ata_pci_bmdma_init_one(pdev, ppi, &marvell_sht, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static const struct pci_device_id marvell_pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	{ PCI_DEVICE(0x11AB, 0x6101), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	{ PCI_DEVICE(0x11AB, 0x6121), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	{ PCI_DEVICE(0x11AB, 0x6123), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	{ PCI_DEVICE(0x11AB, 0x6145), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	{ PCI_DEVICE(0x1B4B, 0x91A0), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	{ PCI_DEVICE(0x1B4B, 0x91A4), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	{ }	/* terminate list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static struct pci_driver marvell_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	.name			= DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	.id_table		= marvell_pci_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	.probe			= marvell_init_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	.remove			= ata_pci_remove_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	.suspend		= ata_pci_device_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	.resume			= ata_pci_device_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) module_pci_driver(marvell_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) MODULE_AUTHOR("Alan Cox");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) MODULE_DESCRIPTION("SCSI low-level driver for Marvell ATA in legacy mode");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) MODULE_DEVICE_TABLE(pci, marvell_pci_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) MODULE_VERSION(DRV_VERSION);