^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * pata_atp867x.c - ARTOP 867X 64bit 4-channel UDMA133 ATA controller driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (C) 2009 Google Inc. John(Jung-Ik) Lee <jilee@google.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Per Atp867 data sheet rev 1.2, Acard.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Based in part on early ide code from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * 2003-2004 by Eric Uhrhane, Google, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * TODO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * 1. RAID features [comparison, XOR, striping, mirroring, etc.]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/gfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/libata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define DRV_NAME "pata_atp867x"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DRV_VERSION "0.7.5"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * IO Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * Note that all runtime hot priv ports are cached in ap private_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) ATP867X_IO_CHANNEL_OFFSET = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * IO Register Bitfields
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ATP867X_IO_PIOSPD_ACTIVE_SHIFT = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) ATP867X_IO_PIOSPD_RECOVER_SHIFT = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ATP867X_IO_DMAMODE_MSTR_SHIFT = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) ATP867X_IO_DMAMODE_MSTR_MASK = 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) ATP867X_IO_DMAMODE_SLAVE_SHIFT = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) ATP867X_IO_DMAMODE_SLAVE_MASK = 0x70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ATP867X_IO_DMAMODE_UDMA_6 = 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ATP867X_IO_DMAMODE_UDMA_5 = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) ATP867X_IO_DMAMODE_UDMA_4 = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ATP867X_IO_DMAMODE_UDMA_3 = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) ATP867X_IO_DMAMODE_UDMA_2 = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ATP867X_IO_DMAMODE_UDMA_1 = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) ATP867X_IO_DMAMODE_UDMA_0 = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) ATP867X_IO_DMAMODE_DISABLE = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) ATP867X_IO_SYS_INFO_66MHZ = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ATP867X_IO_SYS_INFO_SLOW_UDMA5 = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ATP867X_IO_SYS_MASK_RESERVED = (~0xf1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ATP867X_IO_PORTSPD_VAL = 0x1143,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) ATP867X_PREREAD_VAL = 0x0200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ATP867X_NUM_PORTS = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ATP867X_BAR_IOBASE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) ATP867X_BAR_ROMBASE = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define ATP867X_IOBASE(ap) ((ap)->host->iomap[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define ATP867X_SYS_INFO(ap) (0x3F + ATP867X_IOBASE(ap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define ATP867X_IO_PORTBASE(ap, port) (0x00 + ATP867X_IOBASE(ap) + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) (port) * ATP867X_IO_CHANNEL_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define ATP867X_IO_DMABASE(ap, port) (0x40 + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ATP867X_IO_PORTBASE((ap), (port)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define ATP867X_IO_STATUS(ap, port) (0x07 + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ATP867X_IO_PORTBASE((ap), (port)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define ATP867X_IO_ALTSTATUS(ap, port) (0x0E + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ATP867X_IO_PORTBASE((ap), (port)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * hot priv ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define ATP867X_IO_MSTRPIOSPD(ap, port) (0x08 + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ATP867X_IO_DMABASE((ap), (port)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define ATP867X_IO_SLAVPIOSPD(ap, port) (0x09 + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ATP867X_IO_DMABASE((ap), (port)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define ATP867X_IO_8BPIOSPD(ap, port) (0x0A + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ATP867X_IO_DMABASE((ap), (port)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define ATP867X_IO_DMAMODE(ap, port) (0x0B + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ATP867X_IO_DMABASE((ap), (port)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define ATP867X_IO_PORTSPD(ap, port) (0x4A + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ATP867X_IO_PORTBASE((ap), (port)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define ATP867X_IO_PREREAD(ap, port) (0x4C + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) ATP867X_IO_PORTBASE((ap), (port)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct atp867x_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) void __iomem *dma_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) void __iomem *mstr_piospd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) void __iomem *slave_piospd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) void __iomem *eightb_piospd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int pci66mhz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static void atp867x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct pci_dev *pdev = to_pci_dev(ap->host->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct atp867x_priv *dp = ap->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u8 speed = adev->dma_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u8 b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) u8 mode = speed - XFER_UDMA_0 + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * Doc 6.6.9: decrease the udma mode value by 1 for safer UDMA speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * on 66MHz bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * rev-A: UDMA_1~4 (5, 6 no change)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * rev-B: all UDMA modes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * UDMA_0 stays not to disable UDMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (dp->pci66mhz && mode > ATP867X_IO_DMAMODE_UDMA_0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) mode < ATP867X_IO_DMAMODE_UDMA_5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) mode--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) b = ioread8(dp->dma_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (adev->devno & 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) (mode << ATP867X_IO_DMAMODE_SLAVE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) (mode << ATP867X_IO_DMAMODE_MSTR_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) iowrite8(b, dp->dma_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int atp867x_get_active_clocks_shifted(struct ata_port *ap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) unsigned int clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct atp867x_priv *dp = ap->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned char clocks = clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * Doc 6.6.9: increase the clock value by 1 for safer PIO speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * on 66MHz bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (dp->pci66mhz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) clocks++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) switch (clocks) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) clocks = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) case 1 ... 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) printk(KERN_WARNING "ATP867X: active %dclk is invalid. "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) "Using 12clk.\n", clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) case 9 ... 12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) clocks = 7; /* 12 clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) case 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) case 8: /* default 8 clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) clocks = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) goto active_clock_shift_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) active_clock_shift_done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return clocks << ATP867X_IO_PIOSPD_ACTIVE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static int atp867x_get_recover_clocks_shifted(unsigned int clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) unsigned char clocks = clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) switch (clocks) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) clocks = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) case 1 ... 11:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) case 13:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) case 14:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) --clocks; /* by the spec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) case 15:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) printk(KERN_WARNING "ATP867X: recover %dclk is invalid. "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) "Using default 12clk.\n", clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) case 12: /* default 12 clk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) clocks = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return clocks << ATP867X_IO_PIOSPD_RECOVER_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static void atp867x_set_piomode(struct ata_port *ap, struct ata_device *adev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) struct ata_device *peer = ata_dev_pair(adev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct atp867x_priv *dp = ap->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) u8 speed = adev->pio_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) struct ata_timing t, p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) int T, UT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) u8 b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) T = 1000000000 / 33333;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) UT = T / 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) ata_timing_compute(adev, speed, &t, T, UT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (peer && peer->pio_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) b = ioread8(dp->dma_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (adev->devno & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) iowrite8(b, dp->dma_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) b = atp867x_get_active_clocks_shifted(ap, t.active) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) atp867x_get_recover_clocks_shifted(t.recover);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (adev->devno & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) iowrite8(b, dp->slave_piospd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) iowrite8(b, dp->mstr_piospd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) b = atp867x_get_active_clocks_shifted(ap, t.act8b) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) atp867x_get_recover_clocks_shifted(t.rec8b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) iowrite8(b, dp->eightb_piospd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static int atp867x_cable_override(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (pdev->subsystem_vendor == PCI_VENDOR_ID_ARTOP &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) (pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867A ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867B)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static int atp867x_cable_detect(struct ata_port *ap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct pci_dev *pdev = to_pci_dev(ap->host->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (atp867x_cable_override(pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return ATA_CBL_PATA40_SHORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return ATA_CBL_PATA_UNK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static struct scsi_host_template atp867x_sht = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) ATA_BMDMA_SHT(DRV_NAME),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static struct ata_port_operations atp867x_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .inherits = &ata_bmdma_port_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .cable_detect = atp867x_cable_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .set_piomode = atp867x_set_piomode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .set_dmamode = atp867x_set_dmamode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #ifdef ATP867X_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static void atp867x_check_res(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) unsigned long start, len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /* Check the PCI resources for this channel are enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) start = pci_resource_start(pdev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) len = pci_resource_len(pdev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) printk(KERN_DEBUG "ATP867X: resource start:len=%lx:%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) start, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static void atp867x_check_ports(struct ata_port *ap, int port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) struct ata_ioports *ioaddr = &ap->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct atp867x_priv *dp = ap->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) printk(KERN_DEBUG "ATP867X: port[%d] addresses\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) " cmd_addr =0x%llx, 0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) " ctl_addr =0x%llx, 0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) " bmdma_addr =0x%llx, 0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) " data_addr =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) " error_addr =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) " feature_addr =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) " nsect_addr =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) " lbal_addr =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) " lbam_addr =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) " lbah_addr =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) " device_addr =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) " status_addr =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) " command_addr =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) " dp->dma_mode =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) " dp->mstr_piospd =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) " dp->slave_piospd =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) " dp->eightb_piospd =0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) " dp->pci66mhz =0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) (unsigned long long)ioaddr->cmd_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) (unsigned long long)ATP867X_IO_PORTBASE(ap, port),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) (unsigned long long)ioaddr->ctl_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) (unsigned long long)ATP867X_IO_ALTSTATUS(ap, port),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) (unsigned long long)ioaddr->bmdma_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) (unsigned long long)ATP867X_IO_DMABASE(ap, port),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) (unsigned long long)ioaddr->data_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) (unsigned long long)ioaddr->error_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) (unsigned long long)ioaddr->feature_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) (unsigned long long)ioaddr->nsect_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) (unsigned long long)ioaddr->lbal_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) (unsigned long long)ioaddr->lbam_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) (unsigned long long)ioaddr->lbah_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) (unsigned long long)ioaddr->device_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) (unsigned long long)ioaddr->status_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) (unsigned long long)ioaddr->command_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) (unsigned long long)dp->dma_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) (unsigned long long)dp->mstr_piospd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) (unsigned long long)dp->slave_piospd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) (unsigned long long)dp->eightb_piospd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) (unsigned long)dp->pci66mhz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static int atp867x_set_priv(struct ata_port *ap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct pci_dev *pdev = to_pci_dev(ap->host->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) struct atp867x_priv *dp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) int port = ap->port_no;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) dp = ap->private_data =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (dp == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) dp->dma_mode = ATP867X_IO_DMAMODE(ap, port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) dp->mstr_piospd = ATP867X_IO_MSTRPIOSPD(ap, port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) dp->slave_piospd = ATP867X_IO_SLAVPIOSPD(ap, port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) dp->eightb_piospd = ATP867X_IO_8BPIOSPD(ap, port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) dp->pci66mhz =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) ioread8(ATP867X_SYS_INFO(ap)) & ATP867X_IO_SYS_INFO_66MHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static void atp867x_fixup(struct ata_host *host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct pci_dev *pdev = to_pci_dev(host->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct ata_port *ap = host->ports[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) u8 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * Broken BIOS might not set latency high enough
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) if (v < 0x80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) v = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) pci_write_config_byte(pdev, PCI_LATENCY_TIMER, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) printk(KERN_DEBUG "ATP867X: set latency timer of device %s"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) " to %d\n", pci_name(pdev), v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * init 8bit io ports speed(0aaarrrr) to 43h and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * init udma modes of master/slave to 0/0(11h)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) for (i = 0; i < ATP867X_NUM_PORTS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) iowrite16(ATP867X_IO_PORTSPD_VAL, ATP867X_IO_PORTSPD(ap, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) * init PreREAD counts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) for (i = 0; i < ATP867X_NUM_PORTS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) iowrite16(ATP867X_PREREAD_VAL, ATP867X_IO_PREREAD(ap, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) v = ioread8(ATP867X_IOBASE(ap) + 0x28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) v &= 0xcf; /* Enable INTA#: bit4=0 means enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) v |= 0xc0; /* Enable PCI burst, MRM & not immediate interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) iowrite8(v, ATP867X_IOBASE(ap) + 0x28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) * Turn off the over clocked udma5 mode, only for Rev-B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) v = ioread8(ATP867X_SYS_INFO(ap));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) v &= ATP867X_IO_SYS_MASK_RESERVED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) v |= ATP867X_IO_SYS_INFO_SLOW_UDMA5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) iowrite8(v, ATP867X_SYS_INFO(ap));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) static int atp867x_ata_pci_sff_init_host(struct ata_host *host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) struct device *gdev = host->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) struct pci_dev *pdev = to_pci_dev(gdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) unsigned int mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) int i, rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * do not map rombase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) rc = pcim_iomap_regions(pdev, 1 << ATP867X_BAR_IOBASE, DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (rc == -EBUSY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) pcim_pin_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) host->iomap = pcim_iomap_table(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) #ifdef ATP867X_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) atp867x_check_res(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) for (i = 0; i < PCI_STD_NUM_BARS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) printk(KERN_DEBUG "ATP867X: iomap[%d]=0x%llx\n", i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) (unsigned long long)(host->iomap[i]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) * request, iomap BARs and init port addresses accordingly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) for (i = 0; i < host->n_ports; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) struct ata_port *ap = host->ports[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) struct ata_ioports *ioaddr = &ap->ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) ioaddr->cmd_addr = ATP867X_IO_PORTBASE(ap, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) ioaddr->ctl_addr = ioaddr->altstatus_addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) = ATP867X_IO_ALTSTATUS(ap, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) ioaddr->bmdma_addr = ATP867X_IO_DMABASE(ap, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) ata_sff_std_ports(ioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) rc = atp867x_set_priv(ap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #ifdef ATP867X_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) atp867x_check_ports(ap, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) (unsigned long)ioaddr->cmd_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) (unsigned long)ioaddr->ctl_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) ata_port_desc(ap, "bmdma 0x%lx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) (unsigned long)ioaddr->bmdma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) mask |= 1 << i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (!mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) dev_err(gdev, "no available native port\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) atp867x_fixup(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) return dma_set_mask_and_coherent(&pdev->dev, ATA_DMA_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) static int atp867x_init_one(struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static const struct ata_port_info info_867x = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .flags = ATA_FLAG_SLAVE_POSS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .pio_mask = ATA_PIO4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .udma_mask = ATA_UDMA6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .port_ops = &atp867x_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) struct ata_host *host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) const struct ata_port_info *ppi[] = { &info_867x, NULL };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) ata_print_version_once(&pdev->dev, DRV_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) rc = pcim_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) printk(KERN_INFO "ATP867X: ATP867 ATA UDMA133 controller (rev %02X)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) pdev->device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) host = ata_host_alloc_pinfo(&pdev->dev, ppi, ATP867X_NUM_PORTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (!host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) dev_err(&pdev->dev, "failed to allocate ATA host\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) rc = atp867x_ata_pci_sff_init_host(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) dev_err(&pdev->dev, "failed to init host\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) rc = ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) IRQF_SHARED, &atp867x_sht);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) dev_err(&pdev->dev, "failed to activate host\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static int atp867x_reinit_one(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) struct ata_host *host = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) rc = ata_pci_device_do_resume(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) atp867x_fixup(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) ata_host_resume(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) static struct pci_device_id atp867x_pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867A), 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867B), 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static struct pci_driver atp867x_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .id_table = atp867x_pci_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .probe = atp867x_init_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .remove = ata_pci_remove_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .suspend = ata_pci_device_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) .resume = atp867x_reinit_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) module_pci_driver(atp867x_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) MODULE_AUTHOR("John(Jung-Ik) Lee, Google Inc.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) MODULE_DESCRIPTION("low level driver for Artop/Acard 867x ATA controller");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) MODULE_DEVICE_TABLE(pci, atp867x_pci_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) MODULE_VERSION(DRV_VERSION);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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